SFTMP——一个实现软件容错的多处理机系统

多版本软件通过设计相异性实现了软件容错。为了对这种方法进行研究，我们的课题实现了一个三版本软件系统，称之为SFTMP（SoftwareFault－TolerantMultiProcessor）。本文描述了SFTMP的硬件结构和软件执行支持环境，该环境包括同步、表决和监控功能、版本间的通讯及故障的恢复和重构。     

三级相互作用对聚亚甲基链末端距四次矩的影响

本文用三级相互作用近似理论导出了高分子链末端距的四次矩的计算公式。计算聚亚甲基链的末端距四次矩,并同二级相互作用的结果进行了比较。对于聚亚甲基链,三级相互作用近似的四次矩小于二级相互作用近似的四次矩。     

Self-reconfiguration of real-time communication in cyber-physical systems

Today, in domains like automation and robotics systems consist of various sensors and computation nodes. Due to the temporal dependency in quality of measured data, such Cyber-Physical Systems (CPS) commonly have real-time requirements on communication. In addition, these systems shall become more flexible and scalable, e.g., by adding new components to the CPS. This would be most suitable if a CPS could react to the presence of a new component and reconfigure itself to run afterward with the new component integrated to the CPS. This capability is covered by the term Plug-and-Produce. In this paper, we propose a concept to enable Plug-and-Produce within a CPS whose network uses different communication media, e.g., Ethernet and CAN. To enable real-time communication provided by different communication protocols, their different synchronization mechanisms have to be combined to get a common time base within the entire system. For this purpose, we consider Ethernet as well as CAN-based real-time communication protocols and their synchronization mechanisms. The proposed concept for self-reconfiguration aims to be integrated into our three layered software architecture that is presented as well.     

一种基于信令的彩信端到端客户感知优化方法的研究

本文在研究了彩信端到端流程的基础上,开发了一套基于信令的彩信端到端分析平台,分析了彩信端到端流程各阶段的损耗,并详细分析了引起各阶段损耗的原因,然后针对每种原因提出了优化方案,最终提高了彩信端到客户感知。     

无人机自主编队飞行控制的技术问题

从未来无人机的性能需求出发,详细描述了无人机编队飞行的功能特点和核心技术。根据无人机的任务要求,将编队飞行分为作战编队、侦察编队和混合协同编队,同时研究了编队飞行控制的关键技术,并对无人机编队重构技术进行了探讨和分析。     

Interprocedural Compiler Optimization for Partial Run-Time Reconfiguration

In this paper, we study the performance impact of dynamic hardware reconfigurations for current reconfigurable technology. As a testbed, we target the Xilinx Virtex II Pro, the Molen experimental platform and the MPEG2 encoder as the application. Our experiments show that slowdowns of up to a factor 1000 are observed when the configuration latency is not hidden by the compiler. In order to avoid the performance decrease, we propose an interprocedural optimization that minimizes the number of executed hardware configuration instructions taking into account constraints such as the “FPGA-area placement conflicts” between the available hardware configurations. The presented algorithm allows the anticipation of hardware configuration instructions up to the application’s main procedure. The presented results show that our optimization produces a reduction of 3 to 5 order of magnitude of the number of executed hardware configuration instructions. Moreover, the optimization allows to exploit up to 97% of the maximal theoretical speedup achieved by the reconfigurable hardware execution.     

基于SystemACE的FPGA全局动态可重配置的研究

FPGA的全局动态可重配置技术主要是指对运行中的FPGA器件的全部逻辑资源实现在系统的功能变换,从而实现硬件的时分复用。提出了一种基于systemACE的全局动态可重配置设计方法,首先介绍Xilinx SystemACE技术,详细分析FPGA的全局动态可重配置的原理,使用SystemACE控制器件和Compact Flash卡,并讨论了其中的若干细节,然后基于SystemACE实现了Virtex一5系列FPGA全局动态可重配置。实验结果表明,该方法稳定可靠,可实现8种不同比特流的动态配置,与传统的FPGA配置方法相比,其配置更灵活。     

基于TCP友好速率控制和错误隐藏的H.264视频传输

针对互联网视频传输面临拥塞控制和数据包丢失的问题,使得视频压缩码流在传输过程中经常会遇到因各种原因引起的误码丢包等网络传输错误。结合TCP友好的速率控制算法和H.264的特点,提出了一个集成拥塞控制的端到端视频传输框架,实现了根据网络的变化动态地调整码率和解码端的错误隐藏。实验证明,该视频传输系统框架在不同网络情况下,均可收到较好的效果。     

DDS和可重组调制技术的原理和实现

可重组技术(Reconfiguration)是90年代出现的新技术．其基本思想是使用可反复重新组合连接方法的超大面积门阵列．靠软件加栽重新组合，实现功能可编程。对将直接数字频率合成技术(DDS)、可重组技术和数字信号处理技术应用于调制领域进行了研究，成功地实现FSK、MFSK(M=4)、MSK、PSK等调制。试验结果与理论分析逼近，调制的数字化程度高，具有很强的通用性和功能可重组性。     

容错信息融合滤波算法的研究

本文针对容错组合导航的特点，提出一种新的信息融合滤波算法，该算法既能提高系统的容错性能，使系统具有良好的实时故障检测、隔离和重构的能力，又能使系统出现故障时，重构的系统由于获得了融合的系统信息，以较高的精度工作。文中证明该算法与集中卡尔曼滤波器等效，因而是最优的。