64dB二进制增益控制带有DCOC和AB类buffer的可编程增益放大器

本文设计了一款二进制增益控制,带有直流失调消除（DCOC）电路以及AB类输出buffer的可编程增益放大器。该放大器采用二极管连接负载的差分放大器结构,电路性能对温度变化及工艺偏差不敏感。根据测试,通过6位数字信号控制,电路可以实现-2dB ~ 61dB的增益动态范围,增益步长1dB,步长误差在 0.38dB以内,最小3dB带宽为92MHz,在低增益模式下,IIP3可达17dBm,1dB压缩点可达5.7dBm。DCOC电路可使该放大器应用于直接变频接收机中,而AB类输出buffer则降低了电路的静态功耗。     

A dual-mode analog baseband with digital-assisted DC-offset calibration for WCDMA/GSM receivers

A dual-mode analog baseband with digital-assisted DC-offset calibration(DCOC) for WCDMA/GSM receiver is presented.A digital-assisted DCOC is proposed to solve the DC-offset problem by removing the DC-offset component only.This method has no bandwidth sacrifice.After calibration the measured output residual offset voltage is within 5 mV at most gain settings and the IIP2 is more than 60 dBm.The baseband is designed to be reconfigurable at bandwidths of 200 kHz and 2.1 MHz.Total baseband gain can be programmed from 6 to 54 dB.The chip is manufactured with 0.13μm CMOS technology and consumes 10 mA from a 1.5 V supply in the GSM mode including an on-chip buffer while the core area occupies 1.2 mm~2.     

一种应用于IEEE 802.11 b/g/n无线局域网收发机的CMOS模拟基带电路

本文提出了一种应用于直接变频无线局域网收发机的模拟基带电路,该电路采用标准的0.13微米CMOS工艺实现,包括了采用有源RC方式实现的接收4阶椭圆低通滤波器、发射3阶切比雪夫低通滤波器、包含直流失调消除伺服环路的接收可变增益放大器及片上输出缓冲器。芯片面积共1.26平方毫米。接收基带链路增益可在-11dB至49dB间以2dB步长调节。相应地,基带接收输入等效噪声电压（IRN）在50 nV/sqrt(Hz) 至30.2 nV/ sqrt(Hz)间变化而带内输入三阶交调（IIP3）在21dBm至-41dBm间变化。接收及发射低通滤波器的转折频率可在5MHz、10MHz及20MHz之间选择以符合包含802.11b/g/n的多种标准的要求。接收基带I、Q两路的增益可在-1.6dB至0.9dB之间以0.1dB的步长分别调节以实现发射IQ增益失调校正。通过采用基于相同积分器的椭圆滤波器综合技术及作用于电容阵列的全局补偿技术,接收滤波器的功耗显著降低。工作于1.2V电源电压时,整个芯片的基带接收及发射链路分别消耗26.8mA及8mA电流。     

Design of a high linearity and high gain accuracy analog baseband circuit for DAB receiver

本文基于0.18 ?m RFCMOS工艺设计了一种用于DAB数字广播接收机的高线性度高增益精确度模拟基带电路。电路包含一个三阶有源RC复数滤波器（CF）和一个可编程增益放大器（PGA）。复数滤波器包含了自动调谐电路用于调谐滤波器受工艺电压温度等影响的通带特性。电路采用了具有大输出电流摆幅的AB类全差分运放,取代了传统设计中采用的A类全差分运放,实现了高线性度和增益精确度,同时降低了静态工作电流。本文提出了一个新型的基于MOS电阻的直流失调消除电路,大大的减小了电路的建立时间。另外,一种改进的开关电阻网络有效地消除了开关的电阻对可编程增益放大器的增益精确度的影响。 测试结果表明,电路可提供10-50dB的增益控制范围,增益步长为1dB,增益误差小于0.3dB。在增益为10dB的情况下,差分OIP3为23.3dBm。仿真结果表明,建立时间从100mS减小到了1mS。复数滤波器镜频抑制达到了40dB。电路在1.8V电源电压下消耗4.5mA电流。     

采用数字辅助直流失调消除技术适用于WCDMA/GSM接收机的双模模拟基带

A dual-mode analog baseband with digital-assisted DC-offset calibration (DCOC) for WCDMA/GSM receiver is presented. A digital-assisted DCOC is proposed to solve the DC-offset problem by removing the DC-offset component only. This method has no bandwidth sacrifice. After calibration the measured output residual offset voltage is within 5 mV at most gain settings and the IIP₂ is more than 60 dBm. The baseband is designed to be reconfigurable at bandwidths of 200 kHz and 2.1 MHz. Total baseband gain can be programmed from 6 to 54 dB. The chip is manufactured with 0.13 μm CMOS technology and consumes 10 mA from a 1.5 V supply in the GSM mode including an on-chip buffer while the core area occupies 1.2 mm².     

65nm工艺下20Gb/s无电感限幅放大器设计与分析

本文设计了一款能工作在20Gb/s速率下的无电感限幅放大器。限幅放大器包括三各部分：带直流失调消除的输入匹配级,增益级和输出驱动级。本设计采用交叉负反馈技术,使得放大器在获得高带宽的同时拥有较为平坦的频率响应。直流失调消除环路中增加了误差放大器来保证直流失调消除效果。放大器在65纳米工艺下成功流片,芯片面积为0.45 × 0.25平方毫米（不包括PAD）,测试结果显示放大器的差分增益为37dB,带宽为16.5GHz,在高达26.5GHz的频率内Sdd11和Sdd22分别小于-16dB和-9dB。除了驱动级,整个放大器在1.2V的电源电压下消耗50mA的电流。     

一个具有前置低噪放的宽动态范围线性RF功率检测器

摘要：本文给出了一个针对发射机载波泄露抑制的宽动态范围线性射频功率检测器的设计。该检测器基于对数放大器原理,并运用逐级检测的方法在射频频段实现宽动态范围。为提高灵敏度,检测器前端放置了一个低噪声放大器。而出于减小寄生和面积的目的,检测器采用直流耦合的架构,但这将导致电路中的直流失调对其动态范围形成危害。因此,本文提出一个直流失调消除技术用于消除检测器的直流失调。最终,检测器采用SMIC 0.13μm CMOS 工艺流片,测试结果表明其在900MHz/2GHz,分别实现了50dB/40dB的宽动态范围且检测误差在?1dB之内,功耗为16mA?1.5V。面积为0.27?0.67mm2。     

A continuously and widely tunable analog baseband chain with digital-assisted calibration for multi-standard DBS applications

This paper presents a continuously and widely tunable analog baseband chain with a digital-assisted calibration scheme implemented on a 0.13μm CMOS technology.The analog baseband is compliant with several digital broadcasting system（DBS） standards,including DVB-S,DVB-S2,and ABS-S.The cut-off frequency of the baseband circuit can be changed continuously from 4.5 to 32 MHz.The gain adjustment range is from 6 to 55.5 dB with 0.5 dB step.The calibration includes automatic frequency tuning（AFT） and automatic DC offset calibration （DCOC） to achieve less than 6%cut-off frequency deviation and 3 mV residual output offset.The out-of-band IIP2 and IIP3 of the overall chain are 45 dBm and 18 dBm respectively,while the input referred noise（IRN） is 17.4 nV/Hz^1/2.All circuit blocks are operated at 2.8 V from LDO and consume current of 20.4 mA in the receiving mode.