一种低功耗Cache设计技术的研究

低功耗、高性能的cache系统设计是嵌入式DSP芯片设计的关键。本文在多媒体处理DSP芯片MD32的设计实践中，提出一种利用读／写缓冲器作为零级cache，减少对数据、指令cache的读／写次数，由于缓冲器读取功耗远远小于片上cache，从而减小cache相关功耗的方法。通过多种多媒体处理测试程序的验证，该技术可减少对指令cache或者数据cache20％～40％的读取次数，以较小芯片面积的增加换取了较大的功耗降低。     

Research on HTML5 application cache poison attack

HTML5 application cache (AppCache) allowed Web browser to access Web offline.But it also brought a new method of cache poisoning attack that was more persisting.As for websites which used the AppCache,a novel poisoning method RFTM (replace file twice method),in which the attacker replaced the manifest file twice to poison the client’s AppCache,was proposed.Compared with the original attack,the legal server would not receive abnormal HTTP requests from the client in the attack.Therefore,changing the server configuration could not prevent the client from the RFTM AppCache poisoning.To avoid the attack mentioned above,a lightweight signature defense scheme Sec-Cache in application layer was designed.Furthermore,experiments show that it has good performance and compatibility.     

一体化标识网络映射缓存DoS攻击防范方法研究

为了抵御一体化标识网络中接入路由器可能遭受的映射缓存DoS攻击,本文提出了一种基于双门限机制的映射缓存DoS攻击防范方法.该方法设计了一种基于迭代思想的谜题机制降低映射缓存中映射信息条目的增加速率,并采用了映射信息可信度算法识别和过滤映射缓存中恶意的映射信息条目.仿真实验与性能分析表明,该方法能够有效地抵御映射缓存DoS攻击,防止映射缓存溢出.     

一种有资源适应性的transcoding代理缓存机制

在基于transcoding代理的流媒体服务系统中,CPU和网络是两种潜在的瓶颈资源.本文提出了一种有资源适应性的transcoding代理缓存机制,统一考虑CPU和网络的资源需求,以提高系统的服务能力.首先推导了多版本缓存策略下网络收益和CPU收益的计算方法.通过引入一个时变的影响因子 α (t),给出了缓存系统聚合资源收益的表达.在此基础上给出了单个对象的缓存价值函数,并设计了RAC替换算法.实验表明RAC具有较好的资源适应性和系统吞吐率.     

Design of in-network caching scheme in CCN based on grey relational analysis

In-network caching is one of the most important issues in content centric networking （CCN）, which may extremely influence the performance of the caching system. Although much work has been done for in-network caching scheme design in CCN, most of them have not addressed the multiple network attribute parameters jointly during caching algorithm design. Hence, to fill this gap, a new in-network caching based on grey relational analysis （GRA） is proposed. The authors firstly define two newly metric parameters named request influence degree （RID） and cache replacement rate, respectively. The RID indicates the importance of one node along the content delivery path from the view of the interest packets arriving The cache replacement rate is used to denote the caching load of the node. Then combining hops a request traveling from the users and the node traffic, four network attribute parameters are considered during the in-network caching algorithm design. Based on these four network parameters, a GRA based in-network caching algorithm is proposed, which can significantly improve the performance of CCN. Finally, extensive simulation based on ndnSIM is demonstrated that the GRA-based caching scheme can achieve the lower load in the source server and the less average hops than the existing the betweeness （Betw） scheme and the ALWAYS scheme.     

G/S模式下Android地理信息浏览器缓存技术研究

为了研究G/S(geographic information browser/ distributed spatial data servers)模式客户端动态聚合服务,提出了一种在Android系统下基于G/S模式的地理信息浏览器缓存技术。利用移动终端硬件与软件技术的发展优势,将缓存结构分为3部分：用于存储显示地图瓦片的显示缓存,用于预存取的预存取缓存和由SQLite数据库管理的外部缓存。测试结果表明,该技术在提高地图瓦片加载速度的同时消除了移动终端在访问空间数据时的网络瓶颈。     

High-power continuous-wave operation of a diode-pumped laser at

The continuous-wave laser properties of an efficient diode-pumped Nd:GdVO₄ crystal operating at cache/MiamiImageURL/B6V4H-4DYW4VF-1-D/0?wchp=dGLbVzz-zSkzV" alt="View the MathML source" title="View the MathML source" style="vertical-align:bottom" border="0" height=16 width="52"/> formed with a simple plane-concave cavity have been studied. With the incident pump power of 21 W, an output power of 6.9 W was obtained, giving an optical conversion efficiency of 32.8% and a slope efficiency of 35.3%. The laser characterization of two different Nd³⁺-doped concentration of Nd:GdVO₄ crystals were studied.     

基于FPGA的数字视频异步帧频转换器设计

利用DVI接口的同步控制信号生成内存写入地址,帧频触发信号控制内存读取地址的设计思想,在FPGA中实现了从任意帧频的数字视频源转换到50 Hz或60 Hz帧频.给出了帧频转换器的基本硬件结构,和实用的设计方法,并讨论了数据缓冲区设置深度与内存操作带宽的关系.     

Location Management in PCS Networks by Caching Two-Level Forwarding-Pointers

One of the challenging tasks in Personal Communication Services (PCS) is to efficiently maintain the location of PCS subscribers who move from one region to another (hereafter called mobile users). When a mobile user receives a call, the network has to quickly determine its current location. The existing location management scheme suffers from high signaling traffic in locating the mobile users. Two-level forwarding pointer scheme has been proposed from per-user forwarding pointer scheme to reduce the cost of signaling traffic. In this paper, we enhance the two-level forwarding pointer scheme. When a mobile user moves from its current Registered Area (RA), which is served by Mobile Switching Center (MSC), to another RA the local switch that acts as a parent of those two MSCs maintains this movement in its memory (hereafter called cache entry). A cache entry is used to locate rapidly the mobile user instead of querying the Home Location Register (HLR) and waiting for its reply. HLR is centralized in the network and far away from the mobile users so that the signaling traffic crossing it is expensive. Sometimes the cache entry may be failed to reach the mobile user then a two-level forwarding pointers will be created from the corresponding Visitor Location Register (VLR), attached to its MSC, through a correct path to locate the mobile user. Thus, there is a saving in cost of querying the underlying HLR. The analytical results indicate that such proposal efficiently reduces the signaling traffic cost for all values of Call to Mobility Ratio (CMR), this is especially considerable when CMR ≥1, without any increase in the call setup delay. Salah M. Ramadan (samohra@yahoo.com) received the BS and MS degrees from Computers Engineering Department, Al-Azhar University, Cairo, Egypt, in 1995 and 2002, respectively. From 2002, he was a Ph.D. student in Computers Engineering Department at Al-Azhar University and is currently pursuing the Ph.D. degree, where he is a research assistant in the Wireless Networks Branch. His research interests include traffic management in ATM networks, routing protocols, mobility management in PCS networks, and mobile computing. He is currently an instructor in Cisco Academy, Egypt. Ahmed M. El-Sherbini (Sherbini@mcit.gov.eg) received the Ph.D. in Electrical and Communication Engineering, Case Western University, U.S.A. March 1983 and M.Sc. in Communication Engineering, Cairo University, Giza, Egypt, June 1980. (M. Sc. Research Studies at the Ecole Nationale Superieure des Telecommunications (ENST), Paris, France). He is the Director, National Telecommunication Institute – Ministry of Communications and Information Technology, Egypt and Professor of Electrical and Communication Engineering Dept. Faculty of Engineering, Cairo University, Egypt. M. I. Marie received his B.Sc., M.Sc. and Ph.D. in electronic and communication engineering from Cairo University on 1972, 1981, 1985, respectively. Now he is a professor of communications at Computer and System Engineering department Al-Azhar University, Cairo, Egypt. His fields of interest includes digital communication, computer networks and protocols development. M. Zaki (azhar@mailer.scu.eun.eg) is the professor of software engineering, Computer and System Engineering Department, Faculty of Engineering, Al-Azhar University at Cairo. He received his B.Sc. and M.Sc. degrees in electrical engineering from Cairo University in 1968 and 1973 respectively. He received his Ph.D. degrees in computer engineering from Warsaw Technical University, Poland in 1977. His fields of interest include artificial intelligence, soft computing, and distributed system.     

A birth–death model for Web cache systems: Numerical solutions and simulation

In this paper, we study Web cache hit rates by introducing a birth–death model. A system consisting of a single Web server with a single cache stores Web pages that are classified as hot pages (popular pages) and cold pages (less popular pages). Given requested probabilities for each class, the stochastic model provides the mean hit rate for a random replacement algorithm and the upper and low bounds for other algorithms. Numerical results from the analysis are validated using the output of simulation programs that utilize the LRU algorithm.