侧链含自由基单元的1,4-吡咯并吡咯二酮共轭聚合物的合成和半导体性质研究

合成了两个侧链含有2,2,6,6-四甲基哌啶-1-氧自由基单元(TEMPO)的1,4-吡咯并吡咯二酮(DPP)共轭聚合物PDPP4T-1和PDPP4T-2,并开展了其半导体性质研究。薄膜场效应晶体管器件测试结果显示,相对于不含TEMPO的聚合物PDPP4T,PDPP4T-1和PDPP4T-2的场效应器件性能有所降低,不过,含TEMPO的聚合物器件性能最高仍达到了2.12cm~2·V~(-1)·s~(-1)。进一步通过原子力显微镜和X射线衍射对TEMPO引入后导致性能降低的可能原因进行了研究。     

In‐Situ Monitoring of the Solid‐State Microstructure Evolution of Polymer:Fullerene Blend Films Using Field‐Effect Transistors

Organic field‐effect transistors (OFETs) are used to investigate the evolution of the solid‐state microstructure of blends of poly(3‐hexylthiophene) (P3HT) and [6,6]‐phenyl C₆₁‐butyric acid methyl ester (PC₆₁BM) upon annealing. Changes in the measured field‐effect mobility of holes and electrons are shown to reveal relevant information about the phase‐segregation in this system, which are in agreement with a eutectic phase behavior. Using dual‐gate OFETs and in‐situ measurements, it is demonstrated that the spatial‐ and time‐dependence of microstructural changes in such polymer:fullerene blend films can also be probed. A percolation‐theory‐based simulation is carried out to illustrate how phase‐segregation in this system is expected to lead to a substantial decrease in the electron conductivity in an OFET channel, in qualitative agreement with experimental results.     

Assembly of Nanoparticle Patterns with Single‐Particle Resolution Using DNA‐Mediated Charge Trapping Technique: Method and Applications

We report a unique approach for producing one‐dimensional gold‐nanoparticle patterns with single‐particle resolution in which the linewidth is only limited by the particle size. In this approach, a focused electron beam was first utilized to generate a positive charge layer on a SiO₂ surface. Biotinated DNA molecules attracted by these positive charges were subsequently used to grasp Au‐nanoparticles revealing the e‐beam exposure patterns. Due to repulsive force between Au colloidal particles, the particles in the single‐line patterns were orderly separated. We further show that the single‐line patterns hold potential in nano‐photonics and nano‐electronics. For the latter, we demonstrate that the line patterns can serve as a template for conductive nanowires of high or low resistance. While low resistance wires showed linear current–voltage characteristics with an extremely high maximum allowed current density, the high resistance wires exhibited charging effect with clear Coulomb oscillation behavior at low temperatures. This demonstrates that the technique is capable of producing interconnects as well as single‐electron‐transistors, and opens up possibilities for fabrication of integrated circuits.     

Benzodithiophene Copolymer—A Low‐Temperature,Solution‐Processed High‐Performance Semiconductor for Thin‐Film Transistors

Poly(4,8‐didodecyl‐2,6‐bis‐(3‐methylthiophen‐2‐yl)‐benzo[1,2‐b:4,5‐b′]dithiophene) self‐assembled on appropriate substrates from solution and formed highly structured thin films at low temperatures. As an as‐prepared thin‐film semiconductor without thermal annealing, it exhibited excellent field‐effect transistor properties with mobility of ～ 0.15 cm² V^–1 s^–1 in thin‐film transistors.     

Qualification of plastic encapsulated microcircuits (PEM) for avionicsBased on ``Plastic Encapsulated Microcircuits (PEM) Qualification Testing'''', by J. A. Scalise, which appeared in the Proceedings of the 46th Electronic Components and Technology Conference, Orlando, FL, U.S.A., 28–31 May 1996, pp. 392–397. © 1996 IEEE.

Microcircuit package qualification testing is used to establish the reliability of integrated circuit processes and devices as they relate to part packaging. This paper presents the results of package qualification tests conducted on plastic encapsulated microcircuits (PEMs) and plastic discrete devices (diodes, transistors) used in avionics applications. Highly accelerated stress test (HAST) and temperature cycle (TC) test results, including part failure mechanisms and associated failure rates, are provided. A variety of plastic package styles and integrated circuit functions have been tested. Examples of package styles tested include small outline (SO), plastic leaded chip carrier (PLCC), thin small outline package (TSOP), plastic quad flat package (PQFP) and plastic dual-in-line (PDIP).Manufacturers' devices have been evaluated and various plastic compounds have been compared to determine which provide optimum reliability. The testing showed that package qualification performance of PEMs is affected by type of compound, passivation (including die coat) and die size. HAST failures are caused by moisture penetration of the package while temperature cycle failures result from coefficient of thermal expansion (CTE) mismatch effects.     

Restorable Type Conversion of Carbon Nanotube Transistor Using Pyrolytically Controlled Antioxidizing Photosynthesis Coenzyme

Here, a pyrolytically controlled antioxidizing photosynthesis coenzyme, β‐Nicotinamide adenine dinucleotide, reduced dipotassium salt (NADH) for a stable n‐type dopant for carbon nanotube (CNT) transistors is proposed. A strong electron transfer from NADH, mainly nicotinamide, to CNTs takes place during pyrolysis so that not only the type conversion from p‐type to n‐type is realized with 100% of reproducibility but also the on/off ratio of the transistor is significantly improved by increasing on‐current and/or decreasing off‐current. The device was stable up to a few months with negligible current changes under ambient conditions. The n‐type characteristics were completely recovered to an initial doping level after reheat treatment of the device.     

Top Contact Pentacene Organic Thin Film Field Effect Transistors

Using pentacene as an active material, the organic thin film transistors were fabricated on Si_(3)N_(4)/p-Si substrates by using RF-magnetron sputtered amorphous aluminium as the gate electrode contact, and using highly doped Si as the gate electrode and substrate with plasma-enhanced chemical vapor deposited (PECVD) silicon nitride as gate dielectric. Pentacene thin films were deposited by thermal evaporation on dielectrics as the active layer, then RF-magnetron sputtered amorphous aluminium was used as the source and drain contacts. Measurement results show that field effect mobility and threshold voltage are 0.043 cm~2/(V·s) and 12.6 V, respectively, and on-off current ratio is nearly 1×10~(3).     

Organic Thin‐Film Transistors Based on Tolyl‐Substituted Oligothiophenes

Thin films based on the tolyl‐substituted oligothiophenes 5,5′′‐bis(4‐methylphenyl)‐2,2′:5′,2′′‐terthiophene ( 1 ), 5,5′′′‐bis(4‐methylphenyl)‐2,2′:5′,2′′:5′′,2′′′‐quaterthiophene ( 2 ) and 5,5′′′′‐bis(4‐methylphenyl)‐2,2′:5′,2′′:5′′,2′′′:5′′′,2′′′′‐quinqethiophene ( 3 ) exhibit hole‐transport behavior in a thin‐film transistor (TFT) configuration, with reasonable mobilities and high current on/off (I_on/I_off) ratios. Powder X‐ray diffraction (PXRD) reveals that these films, grown by vacuum deposition onto the thermally grown silicon oxide surface of a TFT, are highly crystalline, a characteristic that can be attributed to the general tendency of phenyl groups to promote crystallinity. Atomic force microscopy (AFM) reveals that the films grow layer by layer to form large domains, with some basal domain areas approaching 1000 μm². The PXRD and AFM data are consistent with an “end‐on” orientation of the molecules on the oxide substrate. Variable‐temperature current–voltage (I–V) measurements identified the activation regime for hole transport and revealed shallow level traps in thin films of 1 and 2 , and both shallow and deep level traps in thin films of 3 . The activation energies for thin films of 1 , 2 , and 3 were similar, with values of E_a = 121, 100, and 109 meV, respectively. The corresponding trap densities were N_trap/N_v = 0.012, 0.023, and 0.094, where N_trap is the number of trap states and N_v is the number of conduction states. The hole mobilities for the three compounds were similar (μ ? 0.03 cm² V^–1 s^–1), and the I_on/I_off ratios were comparable with the highest values reported for organic TFTs, with films of 2 approaching I_on/I_off = 10⁹ at room temperature.     

Short-circuit protection for an IGBT with detecting the gate voltage and gate charge

This paper proposes a new short-circuit protection method for an IGBT. The proposed method is characterized by detecting not only gate charge but also gate voltage of the IGBT. This results in a shorter protection time, compared to the previous method that detects only the gate charge. A real-time monitoring system using an FPGA, A/D converters, and a D/A converter is used for the proposed protection method. Experimental results verify that the proposed method achieves a protection time of 390 ns, which is reduced by 68% compared to the previous method.