超高速电流反馈集成运放电路与特性

介绍了超高速电流反馈集成运放电路结构，基本特性以及与电压反馈集成运放在性能上的差异。     

Oscillation based test method of parameterization of open loop op amp and its authentication

The analytical design of differential amplifiers, the building blocks of an op-amp, requires an elegant, handy and computationally simple experimental method of measuring the d.c.super-gain of these blocks. This paper presents such an oscillation based test (OBT) by putting the Op.Amp. under test in the close loop of state variable filter. The oscillation frequency of the linearized system directly yields the d.c. open loop gain, the dominant pole and the second order non-dominant pole of test Op.Amp. The d.c. open loop gain of DUT is further authenticated by a novel method of frequency domain analysis using a super attenuator. The authentication is positive with 95 percent confidence level (ɛ, 0 percent, 9.64 percent) thereby establishing the validity of OBT method.     

A heuristic for constructing a rectilinear Steiner tree by reusing routing resources over obstacles

The obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) problem is a hot topic in very-large-scale integration physical design. In practice, most of the obstacles occupy the device layer and certain lower metal layers. Therefore, we can place wires on top of the obstacles. To maximize routing resources over obstacles, we propose a heuristic for constructing a rectilinear Steiner tree with slew constraints. Our algorithm adopts an extended rectilinear full Steiner tree grid as the routing graph. We mark two types of Steiner point candidates, which are used for constructing Steiner trees and refining solutions. A shortest path heuristic variant is designed for constructing Steiner trees and it takes into account slew constraint by inhibiting growth. Furthermore, we use a pre-computed strategy to avoid calculating slew rate repeatedly. Experimental results show that our algorithm maximizes routing resources over obstacles and saves routing resources outside obstacles. Compared with the conventional OARSMT algorithm, our algorithm reduces the wire length outside obstacles by as much as 18.74% and total wire length by as much as 6.03%. Our algorithm improves the latest related algorithm by approximately 2% in terms of wire length within a reasonable running time. Additionally, calculating the slew rate only accounts for approximately 15% of the total runing time.     

一种静态电流精确可控的AB类运算放大器

针对传统A类两级运算放大器摆率受限的情况,提出了一种新型的AB类两级CMOS运算放大器。仅通过增加一个电阻和电容,就实现了传统A类运算放大器向AB类运算放大器的转变,以及对输出级静态电流的精确控制,极大地改善了摆率,并且不会增加额外的功耗。新的频率补偿方法在保证系统稳定的同时大大增加了单位增益带宽,同时避免了传统补偿所带来的缺点。仿真结果表明,与传统的A类运算放大器相比,提出的AB类运算放大器的正负摆率分别提高到原来的35倍和2.2倍,单位增益带宽提高到原来的5倍。     

运算放大器的速度/带宽优化设计

文章简要介绍了电流反馈和电压反馈运算放大器的基本原理,从理论上分析了两种运放的频率等效模型,进而提出了提高运算放大器速度和带宽的有效途径.另外,文章还对高速运算放大器使用过程中的稳定性进行了简要分析.     

考虑信号上升/下降时间的IC关键路径算法

关键路径问题是数字集成电路静态时序分析中最重要的问题之一。关键路径查找的基本拓扑算法由于没有考虑输入信号上升／下降时间(slew)，在实践中证明并不是完全正确的。文章提出了改进的算法，保证了关键路径查找在考虑信号slew以后的正确性。该算法具有很强的实用性，对从基本拓扑算法发展而来的其他关键路径查找算法也有重要的参考价值。     

无片上电容的负载瞬态响应增强型LDO

提出了一种无片上电容的低压差线性稳压器(LDO),通过增加转换速率增强电路,对LDO输出电压的变化进行探测,从而对误差放大器偏置电流进行补偿,达到改善负载瞬态响应的目的。该LDO基于0.18 μm CMOS工艺设计,输出电压为1.2 V,最大负载电流为100 mA。仿真和测试结果表明,该LDO的瞬态负载响应改善明显,具有较好的低功耗特性,在保证电路稳定性的前提下,大大减小了芯片的面积。     

一种转换速率为2000V/μs的超高速运算放大器

介绍了一种超高速运算放大器,其转换速率为2000 V/μs、建立时间为25ns(精确到0.1% )。重点叙述了其电路结构、工作原理以及PN结隔离互补双极工艺(CBiP)技术。采用CBiP技术实现了纵向NPN、纵向PNP晶体管的兼容。并用Ca-dence SPICE对该电路进行了模拟分析,模拟结果显示SR2500 V/μs。对研制的样品进行了测试分析,其SR2000 V/μs,达到了电路的设计要求     

电压反馈和电流反馈运算放大器的比较

从闭环特性、开环特性、输入级、噪声等几个方面，对电流反馈(CFB)放大器和电压反馈(VFB)放大器进行了详细的比较，得出了CFB放大器和VFB放大器的一些基本特性和应用场合。通过对这两种电路的比较，有助于电路设计师在实际应用中选择最适合自己要求的运算放大器。