SQM-OTFT: A compact model of organic thin-film transistors based on the symmetric quadrature of the accumulation charge considering both deep and tail states

A physically-based compact model of organic thin-film transistors suitable for CAD simulators is proposed. It is worked out by means of a newly developed and particularly simple form of the charge-sheet model: the symmetric quadrature of the accumulation charge. The model is based on the variable-range hopping and accounts for both deep and tail states. It is simple, symmetric, accurately accounts for the below-threshold, linear, and saturation regimes via a unique formulation. The symmetric quadrature is accurate within 5% in all regions of operation and the resulting current model is suitable both for p- and n-type transistors. The model leads to a significant simplification of the drain current and of the quasi-static expressions of the terminal charges based on the Ward–Dutton partition. Finally, the symmetric quadrature leads to an explicit and analytically tractable solution for the surface potential as a function of position in the device channel that can be extremely useful to implement advanced physical effects.     

Simultaneous extraction of source and drain resistances in top contact organic thin film transistors from a single test structure

A method of extraction of source and drain resistances in linear mode of operation from a single transistor is described. The proposed method can also be used to measure source resistance over the entire operating range from linear to saturation mode of operation. The method uses two floating probes outside the channel, one adjacent to the source and the other to the drain to sense the voltage under these contacts. Using transmission line analysis, the source and drain resistances are directly extracted from these measurements. 2D numerical simulation results confirm the validity of the proposed technique and sensitivity analysis shows that the method is more accurate than the conventional gated four probe technique, especially, when the source resistance is much smaller than the channel resistance. Experimental results obtained with Pentacene top-contact transistors are used to illustrate the proposed technique. Analysis of two devices with very different source resistance is carried out to highlight the ability of the proposed technique to offer insight into the different contributing factors. Current crowding under the source contact and accurate estimation of mobility without the distorting effects of source resistance are also described.     

Morphology optimization for achieving air stable and high performance organic field effect transistors

To develop an all organic active matrix light emitting display required for large area thin display, electronic paper and electronic paints, Si-based thin film transistor has to be replaced with organic thin film transistor (OTFT). The most important issues in OTFT are the low charge carrier mobility and poor stability under ambient conditions, which critically depend on how organic thin films are grown on different substrates. Here we show that both these issues are correlated and can be overcome by certain surface morphology which can only be achieved through anisotropic growth. Careful control of different growth parameters can lead to unprecedented control on thin film morphology which has been shown to be engineered reversibly and reproducibly. High temperature and low evaporation rate increase the diffusive mobility of molecules, which are responsible for the stacking of molecules to higher length scales. By carefully choosing a temperature and evaporation rate, elongated rod-like grains were grown for achieving high performance and stable thin film transistors.     

Synthesis and characterization of a novel polymer based on anthracene moiety for organic thin film transistor

We have designed and synthesized a new polymer, which could be used in the organic thin film transistor (OTFT). Poly[2,6‐bis(3′‐dodecythiophene‐2′‐yl)anthracene] (PDTAn), which is composed with anthracene moiety and dodecyl alkyl thiophene, was synthesized by oxidative polymerization using iron (III) chloride. The mole ratio of FeCl₃ and monomer (4.2:1), keeping low temperature during the initiation reaction, amount of solvent, and dropping order were very important for oxidative polymerization without crosslinking. The molecular weight of the polymer (M_w) was measured to be 40,000 with 2.85 of polydispersity index by GPC. The physical and optical properties of the polymer were characterized by differential scanning calorimetry (DSC), cyclic voltammetry (CV), and optical absorption and photoluminescence (PL) spectroscopy. A field‐effect mobility of 1.1 × 10^?4 cm² V^?1 S^?1, a current on/off ratio of 10⁵, and the V_th at ?15.2 V had been obtained for OTFTs using this polymer semiconductor by solution coating. © 2008 Wiley Periodicals, Inc. J Polym Sci Part A: Polym Chem 46: 5115–5122, 2008     

引入悬浮栅对有机薄膜晶体管的阈值电压进行调整

The structure of organic thin film transistors (OTFTs) is optimized by introducing floating gate into the gate dielectric to reduce the threshold voltage of OTFTs in this article. Then the optimized device is simulated and the results of the simulation show the threshold voltage of optimized device is reduced by about 10 V. The reduction of the threshold voltage is helpful and useful for the application of OTFTs in many areas. In addition, this way to reduce threshold voltage of OTFT is compatible with traditional silicon technology and can be used in manufacture.     

Influence of the density of states on the open-circuit voltage in small-molecule solar cells

Open-circuit voltages are strongly dependent on the density-of-states in solar cells based on disordered semiconductors. In this work, organic solar cells based on tetraphenyldibenzoperiflanthene and fullerene C₇₀ with a bilayer structure were fabricated to investigate the variation in the density-of-states with the substrate temperature during deposition of the donor. The maximum open circuit voltage was reached at a substrate temperature of 60 °C. Organic thin-film transistors were also fabricated to study their electrical properties, such as the mobility and the density-of-states. Finally, an organic solar cell with p–i–n structure was fabricated at the optimized substrate temperature, and a power conversion efficiency of almost 4% was obtained.     

Threshold voltage adjustment of organic thin film transistor by introducing a polysilicon floating gate

The structure of organic thin film transistors (OTFTs) is optimized by introducing a floating gate into the gate dielectric to reduce the threshold voltage of OTFTs. Then the optimized device is simulated, and the simulation results show that the threshold voltage of optimized device is reduced by about 10 V. The reduction of the threshold voltage is helpful and useful for the application of OTFTs in many areas. In addition, this way of reducing the threshold voltage of OTFT is compatible with traditional silicon technology and can be used in manufacturing.     

Enhancement of long-term stability of pentacene thin-film transistors encapsulated with transparent SnO2

The long-term stability of pentacene thin-film transistors (TFTs) encapsulated with a transparent SnO₂ thin-film prepared by ion beam-assisted deposition (IBAD) was investigated. After encapsulation process, our organic thin-film transistors (OTFTs) showed somewhat degraded field-effect mobility of 0.5 cm²/(V s) that was initially 0.62 cm²/(V s), when a buffer layer of thermally evaporated 100 nm SnO₂ film had been deposited prior to IBAD process. However, the mobility was surprisingly sustained up to 1 month and then gradually degraded down to 0.35 cm²/(V s) which was still three times higher than that of the OTFT without any encapsulation layer after 100 days in air ambient. The encapsulated OTFTs also exhibited superior on/off current ratio of over 10⁵ to that of the unprotected devices (∼10⁴) which was reduced from ∼10⁶ before aging. Therefore, the enhanced long-term stability of our encapsulated OTFTs should be attributed to well protection of permeation of H₂O and O₂ into the devices by the IBAD SnO₂ thin-film which could be used as an effective inorganic gas barrier for transparent organic electronic devices.     

C8 BTBT薄膜结晶形貌及OTFT器件性能研究

以p型共轭有机小分子2,7二辛基[1]苯并噻吩并[3,2‐b]苯并噻吩(C8‐BTBT)作为底栅顶接触有机薄膜晶体管(OTFT)的有源层,采用浸渍提拉法、喷墨打印法和真空蒸镀法三种制备工艺,探究半导体薄膜载流子迁移率与结晶形貌的关系,发现不同工艺下有机小分子呈现出不同的生长行为和结晶情况,在很大程度上决定了OTFT器件性能的优劣;此外,通过XRD分析研究了退火处理对C8‐BTBT结晶的影响。结果表明,真空蒸镀制备的薄膜具有更高的结晶度、衬底覆盖率高,并且呈现出SK(Stranski‐Krastanov)模式的结晶生长特征,相应器件中陷阱密度最低,迁移率高达5.44 cm^2·V^-1·s^-1,开关比超过106;且退火处理会严重破坏C8‐BTBT薄膜的结晶。因此,控制半导体层的生长行为,提升半导体层的覆盖率和结晶度是制备高性能共轭小分子OTFT器件的有效途径。     

Surface and interface properties of thin pentacene and parylene layers

To improve Organic Thin Film Transistor (OTFT) properties we study OTFT semiconductor/dielectric interfacial properties via examination of the gate dielectric using thin Parylene C layer. Structural and morphology properties of pentacene layers deposited on parylene layer and SiO₂/Si substrate structure were compared. The surface morphology was investigated using atomic force microscopy (AFM) and scanning electron microscopy (SEM). AFM topography of pentacene layer in non-contact mode confirmed the preferable pentacene grain formation on parylene surface in dependence on layer thickness. The distribution of chemical species on the surfaces and composition depth profiles were measured by secondary ion mass spectroscopy (SIMS) and surface imaging. The depth profiles of the analyzed structures show a homogenous pentacene layer, characterized with C or C₂ ions. Relatively sharp interface between pentacene and parylene layers was estimated by characteristic increased intensity of CCl ions peak. For revealing the pentacene phases in the structures the Micro-Raman spectroscopy was utilized. Conformal coatings of parylene and pentacene layers without pinholes resulted from the deposition process as was confirmed by SIMS surface imaging. For the pentacene layers thicker than 20 nm, both thin and bulk pentacene phases were detected by Micro-Raman spectroscopy, while for the pentacene layer thickness of 5 and 10 nm the preferable thin phase was detected. The complete characterisation of pentacene layers deposited on SiO₂ and parylene surface revealed that the formation of large grains suggests 3D pentacene growth at parylene layer with small voids between grains and more than one monolayer step growth. The results will be utilized for optimization of the deposition process.