CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing

As System on a Chip (SoC) testing faces new challenges, some new test architectures must be developed. This paper describes a Test Access Mechanism (TAM) named CAS-BUS that solves some of the new problems the test industry has to deal with. This TAM is scalable, flexible and dynamically reconfigurable. The CAS-BUS architecture is compatible with the IEEE P1500 standard proposal in its current state of development, and is controlled by Boundary Scan features.This basic CAS-BUS architecture has been extended with two independent variants. The first extension has been designed in order to manage SoC made up with both wrapped cores and non wrapped cores with Boundray Scan features. The second deals with a test pin expansion method in order to solve the I/O bandwidth problem. The proposed solution is based on a new compression/decompression mechanism which provides significant results in case of non correlated test patterns processing. This solution avoids TAM performance degradation.These test architectures are based on the CAS-BUS TAM and allow trade-offs to optimize both test time and area overhead. A tool-box environment is provided, in order to automatically generate the needed component to build the chosen SoC test architecture.     

基于PNX1500的TCP/IP协议栈的设计与实现

基于核心处理器PNX1500，介绍了一种TCP／IP协议栈的设计原理和实现方法，同时结合PSOS操作系统，阐述了网卡的编程思路，给出了消息邮箱的实现方法，并给出了一些编程实例。最后提出了在设计中应注意的几个问题。     

基于FPGA的高速采样电路设计与测试

提出利用Xilinx公司新一代现场可编程门阵列(FPGA)-Virtex5芯片对超高速模数转换器ADC08D1500的控制和数据处理方法.实现了ADC08D1500高速稳定的工作和高速被采信号的降速处理,以解决工程中系统采样速率和采样精度问题.详细介绍了布线制板需要注意的特殊问题,最后给出了通过chipscope软件得到的被采信号图,结果显示ADC08D1500性能出色具有高于6.5bit有效位数.设计在工程实践中已经得到使用,并取得了良好的效果.     

一种基于嵌入式IP内核模块的测试方法

嵌入式内核结构的测试正面临着新的挑战,需要提出有效的测试方法。针对IP内核模块测试所面临的技术难点,详细介绍了IP核模块实现测试所需要构建的硬件环境和完整的测试方法,并分析了由测试理论和方法而形成的国际公认标准IEEEP1500。     

基于安全控制边界单元的IP核测试封装方法

为了解决测试信息传递的问题,IEEE组织推出了IEEE1500 IP(Intellectual Property)核测试封装标准以标准化口核测试接口.然而该标准给出的典型测试封装存在由测试数据扫描移人造成的不安全隐患.本文提出了一种基于安全控制边界单元的IP核测试封装方法.这种方法的核心思想是在典型的测试封装边界单元的...     

A BIST-based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques

This paper proposes a new solution for the diagnosis of faults into embedded RAMs, currently under evaluation within STMicroelectronics. The proposed scheme uses dedicated circuitry embedded in a BIST wrapper, and an ATE test program to schedule the data extraction flow and to analyze the gathered information. Testing is performed exploiting a standard IEEE 1149.1 TAP, which allows the access to multiple memory cores with a P1500 compliant solution. The approach aims at implementing a low-cost solution to diagnose embedded RAMs with the goal to minimize the ATE costs and the time required to extract the diagnostic information. In our approach, the ATE drives the diagnostic scheme and performs the classification of faults, allowing the adoption of low-cost equipments. The proposed solution allows a scalable extraction of test data, whose amount is proportional to the available testing time. In order to accelerate fault classification, image processing techniques have been applied. The Hough transform has been adopted to analyze the bitmap representing the faulty cells. Experimental results show the advantages of the proposed approach in terms of time required to complete the diagnostic process.     

Interconnect Delay Fault Test on Boards and SoCs with Multiple Clock Domains

This paper introduces an interconnect delay fault test (IDFT) controller on boards and system‐on‐chips (SoCs) with IEEE 1149.1 and IEEE 1500 wrappers. By capturing the transition signals launched during one system clock, interconnect delay faults operated by different system clocks can be simultaneously tested with our technique. The proposed IDFT technique does not require any modification on boundary scan cells. Instead, a small number of logic gates needs to be plugged around the test access port controller. The IDFT controller is compatible with the IEEE 1149.1 and IEEE 1500 standards. The superiority of our approach is verified by implementation of the controller with benchmark SoCs with IEEE 1500 wrapped cores.     

Carbocyclization in natural products—II : Brominative cyclization of dihydrocostunolide

Treatment of dihydrocostunolide 1 with NBS in aqueous acetone at room temperature furnished bromolactones 3, 4 and 5. Structural evidence for these bromolactones rests upon spectral data and chemical correlations with santanolide “c” 10. Mass spectral fragmentation patterns for the bromolactones, with special reference to 4, have been also discussed.     

SYL1500型长脉冲绿激光治疗蜘蛛痣的临床观察

目的：观察SYL1500型长脉冲绿激光治疗蜘蛛痣的疗效。方法：快速穿透表皮，到达真皮的病变血管，发生病变的血管中血红蛋白选择性吸收532nm的脉冲激光，病变的血管被急剧加热，使得病变血管收缩。结果：经1年随访，无复发，治愈率100％。结论：操作简单，瞄准精确，不易形成疤痕，治愈率高，疗程短，不复发，快速安全。