Electrode metal penetration of amorphous indium gallium zinc oxide semiconductor thin film transistors

Penetration effects of various electrode materials, namely Al, Au, and Cu, on the physical and electrical characteristics of amorphous oxide semiconductor thin film transistors (TFTs) were investigated. Amorphous indium gallium zinc oxide (a-IGZO) TFTs were fabricated with conventional staggered bottom gate structures on a p-type Si substrate. X-ray photoemission spectroscopy (XPS) analysis under the electrode deposition area revealed variations in the oxygen bonding states and material compositions of the a-IGZO layer. Field-emission scanning electron microscopy (FE-SEM) with the line scan of energy dispersive spectroscopy (EDS) showed lateral penetration by the electrode metal. To compare the electrical characteristics of the tested TFTs, the initial current–voltage (I–V) transfer characteristics were examined. In addition, the tested TFTs fabricated using various electrode materials were tested under bias stress to verify the correlations between variations in TFT characteristics and both the metal work function and penetration-induced oxygen vacancies in the channel around the contact area.     

Degradation mechanisms for a-InGaZnO thin-film transistors functioning under simultaneous DC gate and drain biases

Degradation of a-InGaZnO thin-film transistors working under simultaneous DC gate and drain bias stress is investigated, and the corresponding degradation mechanism is proposed and verified. The maximum degradation occurs under the bias stress condition that makes the electric field and electron concentration relatively high at the same time. Trapping of hot electrons in the etching-stop layer under the extended drain electrode is proven to be the underlying mechanism. The observed degradation phenomena, including distortion in the transfer curve on a logarithmic scale and two-slope dependence on gate bias on a linear scale, current crowding in the output curve, and smaller degradation in transfer curves measured under large drain bias, can all be well explained with the proposed degradation mechanism.     

High-performance amorphous indium gallium zinc oxide thin-film transistors with sol-gel processed gate dielectric and channel layer fabricated using microwave irradiation

In this study, we fabricated high-performance a-IGZO TFTs by forming Al₂O₃ and a-IGZO thin films for gate insulator and active channel layer, respectively, using a sol-gel process. MWI for low thermal budget process was used to condensate Al₂O₃ and a-IGZO films, which was compared with the CTA. It is found that the MWI is superior process to the conventional method in terms of precursor and solvent decomposition and has proven to be more effective for eliminating residual organic contaminants. In addition, the MWI-treated Al₂O₃ and IGZO films have smoother surfaces, higher visible light transmittance, lower carbon contamination and impurities than the CTA-treated films. We have demonstrated that a-IGZO TFTs with sol-gel solution-processed Al₂O₃ gate insulator and a-IGZO channel layer can achieve a field effect mobility of 69.2 cm²/V·s, a subthreshold swing of 86.2 mV/decade and a large on/off current ratio of 1.48 × 10⁸, by the MWI process even at temperatures below 200 °C. In addition, the MWI-treated a-IGZO TFTs have excellent resistance to electron trapping and good stability to positive and negative gate-bias stress. Therefore, the sol-gel processed a-IGZO TFTs with Al₂O₃ gate oxide and the MWI treatment with a low thermal budget are promising for emerging transparent flat panel displays applications.     

Electrical behavior of amorphous indium–gallium–zinc oxide thin film transistors by embedding Au nanoparticles in the channel layer

We reported the effects on the electrical behavior of amorphous indium–gallium–zinc oxide (a-IGZO) thin film transistors (TFTs) after introducing various positions and sizes of Au nanoparticles (NPs) in the channel layer. These TFTs showed an off-current increase and threshold voltage (V_th) shift compared to conventional a-IGZO TFTs. The effects of Au NPs are explained to form the carrier conduction path which causes the current leakage in the channel layer, and act as either electron injection sites or trap sites. Therefore, this study demonstrates that the optimized control of size and position of Au NPs in the channel layer is crucial for its application in the electrical stability improvement and V_th control of a-IGZO TFTs.     

Migration of weakly bonded oxygen atoms in a-IGZO thin films and the positive shift of threshold voltage in TFTs

Amorphous indium-gallium-zinc oxide (a-IGZO) thin films are prepared by pulsed laser deposition and fabricated into thin-film transistor (TFT) devices. In-situ x-ray photoelectron spectroscopy (XPS) illustrates that weakly bonded oxygen (O) atoms exist in a-IGZO thin films deposited at high O₂ pressures, but these can be eliminated by vacuum annealing. The threshold voltage (V_th) of the a-IGZO TFTs is shifted under positive gate bias, and the V_th shift is positively related to the deposition pressure. A temperature variation experiment in the range of 20 K-300 K demonstrates that an activation energy of 144 meV is required for the V_th shift, which is close to the activation energy required for the migration of weakly bonded O atoms in a-IGZO thin films. Accordingly, the V_th shift is attributed to the acceptor-like states induced by the accumulation of weakly bonded O atoms at the a-IGZO/SiO₂ interface under positive gate bias. These results provide an insight into the mechanism responsible for the V_th shift of the a-IGZO TFTs and help in the production of reliable designs.     

基于a-IGZO TFT的AMOLED像素电路稳定性的仿真研究

非晶铟镓锌氧化物薄膜晶体管(a-IGZO TFT)有望在有源矩阵有机发光显示(AMOLED)像素电路中得到实际应用,但其电压偏置效应仍会引起电路特性的不稳定。本文利用实验室制备的a-IGZO TFT器件进行参数提取并建立了SPICE仿真模型,通过拟合得到了它的阈值电压随时间变化的方程。在此基础上,采用SPICE软件对基于a-IGZO TFT的2T1C和3T1C两种AMOLED像素电路的稳定性进行了比较研究,证明3T1C电路对阈值电压偏移确实存在一定的补偿效果。最后讨论了进一步改善AMOLED像素电路稳定特性的方法和实际效果。     

Sol-Gel Composites-Based Flexible and Transparent Amorphous Indium Gallium Zinc Oxide Thin-Film Synaptic Transistors for Wearable Intelligent Electronics

In this study, we propose the fabrication of sol-gel composite-based flexible and transparent synaptic transistors on polyimide (PI) substrates. Because a low thermal budget process is essential for the implementation of high-performance synaptic transistors on flexible PI substrates, microwave annealing (MWA) as a heat treatment process suitable for thermally vulnerable substrates was employed and compared to conventional thermal annealing (CTA). In addition, a solution-processed wide-bandgap amorphous In-Ga-Zn (2:1:1) oxide (a-IGZO) channel, an organic polymer chitosan electrolyte-based electric double layer (EDL), and a high-k Ta₂O₅ thin-film dielectric layer were applied to achieve high flexibility and transparency. The essential synaptic plasticity of the flexible and transparent synaptic transistors fabricated with the MWA process was demonstrated by single spike, paired-pulse facilitation, multi-spike facilitation excitatory post-synaptic current (EPSC), and three-cycle evaluation of potentiation and depression behaviors. Furthermore, we verified the mechanical robustness of the fabricated device through repeated bending tests and demonstrated that the electrical properties were stably maintained. As a result, the proposed sol-gel composite-based synaptic transistors are expected to serve as transparent and flexible intelligent electronic devices capable of stable neural operation.     

基于超薄Al2O3栅绝缘层的低工作电压IGZO薄膜晶体管及其在共源极放大器中的应用

随着薄膜晶体管(Thin-film transistor,TFT)在各类新兴电子产品中得到广泛应用,作为各类电子设备的关键组件,其工作电压和稳定性面临着巨大挑战。为了满足未来高度集成化、功能复杂的应用场合,实现其低工作电压和高稳定性就变得异常重要。我们在150 mm×150 mm大面积玻璃基底上,采用磁控溅射非晶铟镓锌氧化物(amorphous indium-gallium-zinc-oxide,a-IGZO)作为有源层,以原子层沉积(ALD)Al2O3为栅绝缘层,制备了底栅顶接触型a-IGZO TFT,并研究了50,40,30,20 nm超薄Al2O3栅绝缘层对TFT器件的影响。其中,20 nm超薄Al2O3栅绝缘层TFT具有最优综合性能:1 V的低工作电压、接近0 V的阈值电压和仅为65.21 mV/dec的亚阈值摆幅,还具有15.52 cm^2/(V·s)的高载流子迁移率以及5.85×10^7的高开关比。同时,器件还表现出优异的稳定性:栅极±5 V偏压1 h阈值电压波动最小仅为0.09 V以及优良的150 mm×150 mm大面积分布均一性。实现了TFT器件的低工作电压和高稳定性。最后,以该TFT器件为基础设计了共源极放大器,得到14 dB的放大增益。     

High-performance amorphous In-Ga-Zn-O thin-film transistor nonvolatile memory with a novel p-SnO/n-SnO2 heterojunction charge trapping stack

Amorphous In-Ga-Zn-O (a-IGZO) thin-film transistor (TFT) memories with novel p-SnO/n-SnO₂ heterojunction charge trapping stacks (CTSs) are investigated comparatively under a maximum fabrication temperature of 280 ℃. Compared to a single p-SnO or n-SnO₂ charge trapping layer (CTL), the heterojunction CTSs can achieve electrically programmable and erasable characteristics as well as good data retention. Of the two CTSs, the tunneling layer/p-SnO/n-SnO₂/blocking layer architecture demonstrates much higher program efficiency, more robust data retention, and comparably superior erase characteristics. The resulting memory window is as large as 6.66 V after programming at 13 V/1 ms and erasing at -8 V/1 ms, and the ten-year memory window is extrapolated to be 4.41 V. This is attributed to shallow traps in p-SnO and deep traps in n-SnO₂, and the formation of a built-in electric field in the heterojunction.     

负电荷层对a-IGZO TFT阈值电压的影响

采用脉冲直流磁控溅射的方式沉积In-Ga-Zn-O (IGZO)膜层作为TFT的有源层.在TFT沟道处的有源层和绝缘层的界面上, 通过溅射法制作一定厚度的负电荷层对阈值电压(V_th)进行调制, 使得V_th由-3.8 V升高至-0.3 V, 器件由耗尽型向增强型转变.通过增加Al₂O₃作为负电荷层, 可有效地将V_th控制在0 V附近, 并且提高其器件稳定性, 得到较好的电学特性:电流开关比I_on/I_off>10⁹, 亚阈值摆幅SS为0.2 V/dec, 阈值电压V_th为-0.3 V, 迁移率μ为9.2 cm² /(V·s).