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In this work we analysed the stepwise charging technique to find the limits from which it is beneficial in terms of load capacitance and charge–discharge frequency. We included in the analysis practical limitations such as the consumption of auxiliary logic needed to implement the technique and the minimum size of auxiliary switches imposed by the technology. We proposed an ultra-low-power logic block to push these limits and to obtain benefits from this technique in small capacitances. Finally, we proposed to use a stepwise driver in the driving of the gate capacitance of power switches in switched-capacitor (SC) DC–DC converters. We designed and manufactured, in a 130 nm process, a SC DC–DC converter and measured a 29% energy reduction in the gate-drive losses of the converter. This accounts for an improvement of 4% (from 69 to 73%) in the overall converter efficiency.
相似文献Sampling or task jitter affects the performance of digital control systems but realistic simulation of this effect has not been possible to date. Our previous work has developed a novel method to simulate sampling jitter in MATLAB/Simulink simulation software where the jitter is generated randomly. What has been missing is a way to capture sampling jitter from a target platform and then feed this timing information into the simulation. This paper presents a low-cost and novel solution to these problems. The method uses an Arduino board to capture task jitter from two different hardware platforms with multiple stressing conditions. Then the recorded performance data is used to drive realistic simulations of a control system. Measurement shows that the task jitter data does not follow any specific random distribution such as Gaussian or Uniform. Furthermore, very occasional timing patterns, which may not be picked up while testing a real system, can result in extreme controller responses. This novel method allows comparisons of different platforms and reduces the effort required to choose the most appropriate platform for full implementation.
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