Lateral ion implant straggle and mask proximity effect

Lateral scattering of retrograde well implants is shown to have an effect on the threshold voltage of nearby devices. The threshold voltage of both NMOSFETs and PMOSFETs increases in magnitude for conventional retrograde wells, but for triple-well isolated NMOSFETs the threshold voltage decreases for narrow devices near the edge of the well. Electrical data, SIMS, and SUPREM4 simulations are shown that elucidate the phenomenon.     

Vascular morphology by three-dimensional magnetic resonance imaging

A three-dimensional examination of blood vessels is provided using MR data from seven cases. The vascular surfaces are constructed with an algorithm that automatically follows the selected artery or vein and generates a projected three-dimensional gradient shaded image. Fast 3DFT pulse sequences were optimized to enhance the time-of-flight contrast of the intravascular region. By increasing the surface threshold value in a three-dimensional head study, the flesh of a patient's face was peeled away to demonstrate the superfacial temporal artery. Gated cardiac images show the great vessels and cardiac chambers. A three-dimensional view of the aorta shows an irregular surface in the vicinity of an adrenal tumor. 3D MR exams provide a non-invasive technique for assessing vascular morphology in a clinical setting.     

On the feasibility of antideuteron production and storage at CERN

The new Antiproton Accumulator Complex is now in operation at CERN. We consider the possibility of using this facility to create and store antideuterons and conclude that we could achieve an accumulation rate of about 2·10⁶ particles/day. No major rebuild of the rings is envisaged, but it is thought that modification to existing components and becoming operational would take about 5 to 6 months. We stress, however, that the operation of such a facility and the use of any stack of antideuterons for particle physics would be extremely taxing.     

Negative luminescence from mid-wave infrared HgCdTe diode arrays

A self-referencing, optical modulation technique was used to measure the negative luminescence efficiencies of an array of mid-wave infrared HgCdTe photodiodes with cutoff wavelength 4.6 μm as a function of sample temperature. The internal efficiency at a wavelength of 4 μm was 93% at 295 K, and nearly independent of temperature in the 240–300 K range. This corresponds to an apparent temperature reduction >50 K at room temperature and >30 K at 240 K. Moreover, the reverse-bias saturation current density was only 0.13 A/cm². The measured transmission and emission spectra were simulated using empirical HgCdTe absorption formulas from the literature.     

Explicit 2-Factorisations of the Odd Graph

In this note we show how 1-factors in the middle two layers of the discrete cube can be used to construct 2-factors in the Odd graph (the Kneser graph of (k − 1)-sets from a (2k − 1)-set). In particular, we use the lexical matchings of Kierstead and Trotter, and the modular matchings of Duffus, Kierstead and Snevily, to give explicit constructions of two different 2-factorisations of the Odd graph. This revised version was published online in September 2006 with corrections to the Cover Date.     

Genetic algorithms in engineering electromagnetics

This paper presents a tutorial and overview of genetic algorithms for electromagnetic optimization. Genetic-algorithm (GA) optimizers are robust, stochastic search methods modeled on the concepts of natural selection and evolution. The relationship between traditional optimization techniques and the GA is discussed. Step-by-step implementation aspects of the GA are detailed, through an example with the objective of providing useful guidelines for the potential user. Extensive use is made of sidebars and graphical presentation to facilitate understanding. The tutorial is followed by a discussion of several electromagnetic applications in which the GA has proven useful. The applications discussed include the design of lightweight, broadband microwave absorbers, the reduction of array sidelobes in thinned arrays, the design of shaped-beam antenna arrays, the extraction of natural resonance modes of radar targets from backscattered response data, and the design of broadband patch antennas. Genetic-algorithm optimization is shown to be suitable for optimizing a broad class of problems of interest to the electromagnetic community. A comprehensive list of key references, organized by application category, is also provided     

Pocket pagers in lots of one CIM

The Fusion program, a method for agile, flexible computer integrated manufacturing (CIM) at Motorola's Paging Products Group, is discussed. Fusion's CIM and automated assembly system can manufacture a wide variety of different products on the same production line. The development of the Fusion program and how it differs from its predecessor, the Bandit program, are described     

Multi-emitter Si/GexSi1-x heterojunctionbipolar transistor with no base contact and enhanced logic functionality

We demonstrate multi-emitter Si/Ge_xSi_1-x n-p-n heterojunction bipolar transistors (HBT's) which require no base contact for transistor operation. The base current is supplied by the additional emitter contact under reverse bias due to the heavy doping of the emitter-base junction. Large-area HBT test structures exhibit good transistor characteristics, with current gain β≈400 regardless of whether the base current is supplied by a test base electrode or one of the emitter contacts. These devices have enhanced logic functionality because of emitter contact symmetry. Since device fabrication does not require base electrode formation, the number of processing steps can be reduced without significant penalty to HBT performance     

Micropipelined asynchronous discrete cosine transform (DCT/IDCT)processor

We describe the design and implementation of an asynchronous discrete cosine transform/inverse discrete cosine transform (DCT/IDCT) processor core compliant with the CCITT recommendation H.261. First, a micropipelined implementation with level-sensitive latches is shown. This is improved by replacing the level-sensitive latches with dual-edge triggered flip-flops to save power and using completion-detection adders in the critical stage of the pipeline to exploit the data-dependent processing delay. Gate-level simulation of extracted layouts indicates that the performance of asynchronous implementations is comparable with that of a synchronous implementation based on an identical architecture. This is because part of the penalty introduced by handshaking circuitry in an asynchronous pipeline can be recovered by exploiting data-dependent processing delays with completion-detection circuitry. In pipelines with significant arithmetic processing such as the DCT/IDCT processor, this is easily accomplished. Our results are encouraging because asynchronous designs do not employ global clocking. In the near future when clock generation, clock distribution, and the power consumed in the clock circuitry become limiting factors in the design of large synchronous application specific integrated circuits (ASICs), asynchronous implementation methodology could be pursued as a real alternative