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赵星  梅博  毕津顺  郑中山  高林春  曾传滨  罗家俊  于芳  韩郑生 《物理学报》2015,64(13):136102-136102
利用脉冲激光入射技术研究100级0.18 μm部分耗尽绝缘体上硅互补金属氧化物半导体反相器链的单粒子瞬态效应, 分析了激光入射器件类型及入射位置对单粒子瞬态脉冲传输特性的影响. 实验结果表明, 单粒子瞬态脉冲在反相器链中的传输与激光入射位置有关, 当激光入射第100级到第2级的n型金属-氧化物-半导体器件, 得到的脉冲宽度从287.4 ps增加到427.5 ps; 当激光入射第99级到第1级的p型金属-氧化物-半导体器件, 得到的脉冲宽度从150.5 ps增加到295.9 ps. 激光入射点靠近输出则得到的瞬态波形窄; 靠近输入则得到的瞬态波形较宽, 单粒子瞬态脉冲随着反相器链的传输而展宽. 入射器件的类型对单粒子瞬态脉冲展宽无影响. 通过理论分析得到, 部分耗尽绝缘体上硅器件浮体效应导致的阈值电压迟滞是反相器链单粒子瞬态脉冲展宽的主要原因. 而示波器观察到的与预期结果幅值相反的正输出脉冲, 是输出节点电容充放电的结果.  相似文献   
2.
毕津顺  刘刚  罗家俊  韩郑生 《物理学报》2013,62(20):208501-208501
利用计算机辅助设计技术数值仿真工具, 研究22 nm工艺技术节点下超薄体全耗尽绝缘体上硅晶体管单粒子瞬态效应, 系统地分析了掺杂地平面技术、重离子入射位置、栅功函数和衬底偏置电压对于单粒子瞬态效应的影响. 模拟结果表明, 掺杂地平面和量子效应对于单粒子瞬态效应影响很小, 重离子入射产生大量电荷, 屏蔽了初始电荷分布的差异性. 单粒子瞬态效应以及收集电荷和重离子入射位置强相关, 超薄体全耗尽绝缘体上硅最敏感的区域靠近漏端. 当栅功函数从4.3 eV变化到4.65 eV时, 单粒子瞬态电流峰值从564 μA减小到509 μA, 收集电荷从4.57 fC减小到3.97 fC. 超薄体全耗尽绝缘体上硅器件单粒子瞬态电流峰值被衬底偏置电压强烈调制, 但是收集电荷却与衬底偏置电压弱相关. 关键词: 超薄体全耗尽绝缘体上硅 单粒子瞬态效应 电荷收集 数值仿真  相似文献   
3.
The experimental results of the cryogenic temperature characteristics on 0.18-μm silicon-on-insulator(SOI) metaloxide-silicon(MOS) field-effect-transistors(FETs) were presented in detail. The current and capacitance characteristics for different operating conditions ranging from 300 K to 10 K were discussed. SOI MOSFETs at cryogenic temperature exhibit improved performance, as expected. Nevertheless, operation at cryogenic temperature also demonstrates abnormal behaviors, such as the impurity freeze-out and series resistance effects. In this paper, the critical parameters of the devices were extracted with a specific method from 300 K to 10 K. Accordingly, some temperature-dependent-parameter models were created to improve fitting precision at cryogenic temperature.  相似文献   
4.
In this paper, we investigate the single event transient(SET) occurring in partially depleted silicon-on-insulator(PDSOI) metal–oxide–semiconductor(MOS) devices irradiated by pulsed laser beams. Transient signal characteristics of a 0.18-μm single MOS device, such as SET pulse width, pulse maximum, and collected charge, are measured and analyzed at wafer level. We analyze in detail the influences of supply voltage and pulse energy on the SET characteristics of the device under test(DUT). The dependences of SET characteristics on drain-induced barrier lowering(DIBL) and the parasitic bipolar junction transistor(PBJT) are also discussed. These results provide a guide for radiation-hardened deep sub-micrometer PDSOI technology for space electronics applications.  相似文献   
5.
Because of the discrete charge storage mechanism, charge trapping memory(CTM) technique is a good candidate for aerospace and military missions. The total ionization dose(TID) effects on CTM cells with Al_2O_3/HfO_2/Al_2O_3(AHA) high-k gate stack structure under in-situ 10 keV x-rays are studied. The C-V characteristics at different radiation doses demonstrate that charge stored in the device continues to be leaked away during the irradiation,thereby inducing the shift of flat band voltage(V_(fb)). The dc memory window shows insignificant changes, suggesting the existence of good P/E ability. Furthermore, the physical mechanisms of TID induced radiation damages in AHA-based CTM are analyzed.  相似文献   
6.
深亚微米SOI射频 LDMOS功率特性研究   总被引:1,自引:0,他引:1       下载免费PDF全文
毕津顺  海潮和  韩郑生 《物理学报》2011,60(1):18501-018501
提出了一种SOI LDMOS大信号等效电路模型,并给出了功率增益和输入阻抗表达式. 基于制备的深亚微米SOI射频LDMOS,测试了功率增益和功率附加效率. 深入研究了SOI LDMOS功率特性与栅长,单指宽度,工作电压和频率之间关系. 栅长由0.5 μm减到0.35 μm时,小信号功率增益增加44%,功率附加效率峰值增加9%. 单指宽度由20 μm增加到40 μm,600 μm /0.5 μm器件小信号功率增益降低23%,功率附加效率峰值降低9.3%. 漏端电压由3 V增加到5 V,600 μm /0.3 关键词: SOI射频 LDMOS 深亚微米 功率增益 功率附加效率  相似文献   
7.
Upset errors in 90-nm 64 Mb NOR-type floating-gate Flash memory induced by accelerated ~(129)Xe and ~(209)Bi ions are investigated in detail. The linear energy transfer covers the range from 50 to 99.8 Me V/(mg/cm~2). When the memory chips are powered off during heavy ions irradiation, single-event-latch-up and single-event-function-interruption are excluded,and only 0-1 upset errors in the memory array are observed. These error bit rates seem very difficult to achieve and cannot be simply recovered based on the power cycle. The number of error bits shows a strong dependence on the linear energy transfer(LET). Under room-temperature annealing conditions, the upset errors can be reduced by about two orders of magnitude using rewrite/reprogram operations, but they subsequently increase once again in a few minutes after the power cycle. High-temperature annealing can diminish almost all error bits, which are affected by the lower LET ~(129)Xe ions. The percolation path between the floating-gate(FG) and the substrate contributes to the radiation-induced leakage current, and has been identified as the root cause of the upset errors of the Flash memory array in this work.  相似文献   
8.
The ~(60)Co-γ ray total ionizing dose radiation responses of 55-nm silicon-oxide-nitride-oxide-silicon(SONOS) memory cells in pulse mode(programmed/erased with pulse voltage) and dc mode(programmed/erased with direct voltage sweeping) are investigated. The threshold voltage and off-state current of memory cells before and after radiation are measured. The experimental results show that the memory cells in pulse mode have a better radiation-hard capability. The normalized memory window still remains at 60% for cells in dc mode and 76% for cells in pulse mode after 300 krad(Si) radiation. The charge loss process physical mechanisms of programmed SONOS devices during radiation are analyzed.  相似文献   
9.
曹杨  习凯  徐彦楠  李梅  李博  毕津顺  刘明 《物理学报》2019,68(3):38501-038501
基于~(60)Co-γ射线和10 keV X射线辐射源,系统地研究了55 nm硅-氧化硅-氮化硅-氧化硅-硅闪存单元的电离总剂量效应,并特别关注其电学特性退化的规律与物理机制.总剂量辐照引起闪存单元I-V特性曲线漂移、存储窗口变小和静态电流增大等电学特性的退化现象,并对其数据保持能力产生影响.编程态闪存单元的I_d-V_g曲线在辐照后显著负向漂移,而擦除态负向漂移幅度较小.对比两种射线辐照,擦除态的I_d-V_g曲线漂移方向不同.相比于擦除态,富含存储电子的编程态对总剂量辐照更为敏感;且相比于~(60)Co-γ射线,本文观测到了显著的X射线剂量增强效应.利用TCAD和Geant 4工具,从能带理论详细讨论了55 nm硅-氧化硅-氮化硅-氧化硅-硅闪存单元电离总剂量效应和损伤的物理机制,并模拟和深入分析了X射线的剂量增强效应.  相似文献   
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