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Pinning effect of lead lanthanum titanate (PLT) ferroelectric thin films with excess PbO of 20 mol% has been studied for deposition on diffe rent substrates. Silicon, sapphire and quartz were used as substrates on which P t/Ti or LaNiO3 thin films were deposited as bottom electrodes. Electron probe analysis results showed that there was still a certain amount of excess Pb in PLT films after annealing at 550 ℃ for 1 h, and the amount of it was dependent on the substrate used. The distribution of excess Pb in the films was investig ated by Auger electron spectroscopy depth profile. It was shown that the substrates and the bottom electrodes had significant effects on the content and distrib ution of excess Pb in PLT films. The excess Pb and its accumulation at the inter face between the film and bottom electrode may act as pinning centers and have a pinning effect on domains, which can be observed by abnormal P-E hysteresis loops and abnormal C-V curves. The excess Pb content in the films and the accumulation of Pb at the interface were high in PLT films deposited on Pt/Ti/S i, and considerable pinning effect was observed. As LaNiO3 would absorb most part of the excess Pb in PLT films, the content of excess Pb in the films deposited on LaNiO3/Si was very low and the pinning effect was hardly observed. 相似文献
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Crystallization Process of Superlattice-Like Sb/SiO_2 Thin Films for Phase Change Memory Application 下载免费PDF全文
After compositing with SiO_2 layers, it is shown that superlattice-like Sb/SiO_2 thin films have higher crystallization temperature(~240°C), larger crystallization activation energy(6.22 e V), and better data retention ability(189°C for 10 y). The crystallization of Sb in superlattice-like Sb/SiO_2 thin films is restrained by the multilayer interfaces. The reversible resistance transition can be achieved by an electric pulse as short as 8 ns for the Sb(3 nm)/SiO_2(7 nm)-based phase change memory cell. A lower operation power consumption of 0.09 m W and a good endurance of 3.0 × 10~6 cycles are achieved. In addition, the superlattice-like Sb(3 nm)/SiO_2(7 nm) thin film shows a low thermal conductivity of 0.13 W/(m·K). 相似文献
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This paper investigated phase change Si1Sb2Te3 material for application of chalcogenide random access memory. Current-voltage performance was conducted to determine threshold current of phase change from amorphous phase to polycrystalline phase. The film holds a threshold current about 0.155 mA, which is smaller than the value 0.31 mA of Ge2Sb2Te5 film. Amorphous Si1Sb2Te3 changes to face-centred-cubic structure at ~ 180℃ and changes to hexagonal structure at ~ 270℃. Annealing temperature dependent electric resistivity of Si1Sb2Te3 film was studied by four-point probe method. Data retention of the films was characterized as well. 相似文献
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采用原位X射线衍射仪、拉曼光谱仪和X射线反射仪分别研究了Cu-Sb2Te 薄膜的微结构、成键结构和结晶前后的密度变化. Sb2Te薄膜的结晶温度随着Cu含量的增加而增大. 在10 at.%和14 at.% Cu的Sb2Te薄膜中, Cu与 Te 成键, 结晶相由六方相的Cu7Te4、菱形相的Sb及六方相的Sb2Te构成. 10 at.% 和14 at.% Cu 的Sb2Te薄膜在结晶前后的厚度变化分别约为3.2%和 4.0%, 均小于传统的Ge2Sb2Te5 (GST)薄膜. 制备了基于Cu-Sb2Te薄膜的相变存储单元, 并测试了其器件性能. Cu-Sb2Te器件均能在10 ns的电脉冲下实现可逆SET-RESET操作. SET和RESET操作电压随着Cu含量的增加而减小. 疲劳测试结果显示, Cu 含量为10 at.%和14 at.%的PCRAM单元的循环操作次数分别达到1.3×104和1.5×105, RESET和SET态的电阻比值约为100. Cu-Sb2Te可以作为应用于高速相变存储器(PCRAM)的候选材料. 相似文献
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Single Crystal Si Layers on Glass Fabricated by Hydrophilic Fusion Bonding and Smart-Cut Technology 下载免费PDF全文
A single crystal Si thin film on a glass substrate has been obtained successfully by hydrophilic fusion bonding and the smart-cut technology. Tensile strength testing shows that the bonded interface has strong adhesion and the bonding strength is about 8.7MPa. Crystallinity and microstructure of the samples have been characterized by transmission electron microscopy (TEM). Electrical properties have also been investigated by Hall measurements and four-point probe. The mobility of the transferred Si layer on glass is about 122cm^2//V.s. The results show that the single-crystal silicon layer transferred onto glass by direct bonding keeps good quality for the applications of integrated circuits, transducers, and fiat panel display. 相似文献
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Ge_2Sb_2Te_5 film was deposited by RF magnetron sputtering on Si (100) substrate. The structure of amorphous and crystalline Ge_2Sb_2Te_5 thin films was investigated using XRD, Raman spectra and XPS. XRD measurements revealed the existence of two different crystalline phases, which has a FCC structure and a hexagonal structure, respectively. The broad peak in the Raman spectra of amorphous Ge_2Sb_2Te_5 film is due to the amorphous -Te--Te- stretching. As the annealing temperature increases, the broad peak separates into two peaks, which indicates that the heteropolar bond in GeTe_4 and the Sb-Sb bond are connected with four Te atoms, and other units such as (TeSb) Sb-Sb (Te_2) and (Sb_2) Sb-Sb (Te_2), where some of the four Te atoms in the above formula are replaced by Sb atoms, remain in crystalline Ge_2Sb_2Te_5 thin film. And from the results of Raman spectra and XPS, higher the annealing temperature, more Te atoms bond to Ge atoms and more Sb atoms substitute Te in (Te_2) Sb-Sb (Te_2). 相似文献
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Reactive Ion Etching as Cleaning Method Post Chemical Mechanical Polishing for Phase Change Memory Device 下载免费PDF全文
In order to improve nano-scale phase change memory performance, a super-clean interface should be obtained after chemical mechanical polishing (CMP) of Ge2Sb2Te5 phase change films. We use reactive ion etching (RIE) as the cleaning method. The cleaning effect is analysed by scanning electron microscopy and an energy dispersive spectrometer. The results show that particle residue on the surface has been removed. Meanwhile, Ge2Sb2Te5 material stoichiometric content ratios are unchanged. After the top electrode is deposited, currentvoltage characteristics test demonstrates that the set threshold voltage is reduced from 13 V to 2.7V and the threshold current from 0.1 mA to 0.025 mA. Furthermore, we analyse the RIE cleaning principle and compare it with the ultrasonic method. 相似文献
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Chemical mechanical planarization of Ge_2Sb_2Te_5 using IC1010 and Politex reg pads in acidic slurry 下载免费PDF全文
In the paper, chemical mechanical planarization(CMP) of Ge2Sb2Te5(GST) is investigated using IC1010 and Politex reg pads in acidic slurry. For the CMP with blank wafer, it is found that the removal rate(RR) of GST increases with the increase of pressure for both pads, but the RR of GST polished using IC1010 is far more than that of Politex reg. To check the surface defects, GST film is observed with an optical microscope(OM) and scanning electron microscope(SEM). For the CMP with Politex reg, many spots are observed on the surface of the blank wafer with OM, but no obvious spots are observed with SEM. With regard to the patterned wafer, a few stains are observed on the GST cell, but many residues are found on other area with OM. However, from SEM results, a few residues are observed on the GST cell, more dielectric loss is revealed about the trench structure. For the CMP with IC1010, the surface of the polished blank wafer suffers serious scratches found with both OM and SEM, which may result from a low hardness of GST, compared with those of IC1010 and abrasives. With regard to the patterned wafer, it can achieve a clean surface and almost no scratches are observed with OM, which may result from the high-hardness SiO2 film on the surface, not from the soft GST film across the whole wafer. From the SEM results, a clean interface and no residues are observed on the GST surface, and less dielectric loss is revealed. Compared with Politex reg, the patterned wafer can achieve a good performance after CMP using IC1010. 相似文献
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Nano-scale gap filling and mechanism of deposit-etch-deposit process for phase-change material 下载免费PDF全文
Ge2Sb2Te5 gap filling is one of the key processes for phase-change random access memory manufacture.Physical vapor deposition is the mainstream method of Ge2Sb2Te5 film deposition due to its advantages of film quality,purity,and accurate composition control.However,the conventional physical vapor deposition process cannot meet the gapfilling requirement with the critical device dimension scaling down to 90 nm or below.In this study,we find that the deposit-etch-deposit process shows better gap-filling capability and scalability than the single-step deposition process,especially at the nano-scale critical dimension.The gap-filling mechanism of the deposit-etch-deposit process was briefly discussed.We also find that re-deposition of phase-change material from via the sidewall to via the bottom by argon ion bombardment during the etch step was a key ingredient for the final good gap filling.We achieve void-free gap filling of phase-change material on the 45-nm via the two-cycle deposit-etch-deposit process.We gain a rather comprehensive insight into the mechanism of deposit-etch-deposit process and propose a potential gap-filling solution for over 45-nm technology nodes for phase-change random access memory. 相似文献