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1.
Tsividis  Y.P. 《Electronics letters》1987,23(15):777-778
A minimal integrated filter containing four MOS transistors as the only circuit elements is presented. Voltage tuning is used to set the cutoff frequency and band-edge peaking. A filter test chip occupies an active area of 0006mm2, has acutoff frequency of 40 MHz and dissipates 580W.  相似文献   
2.
Current copier cells   总被引:4,自引:0,他引:4  
Analogue circuits are presented that can sample, hold, and make practically identical multiple copies of current signals, without the need for accurate matching of active or passive circuit components  相似文献   
3.
This paper presents a systematic noise analysis method for externally linear filters, suitable for hand calculations. As an illustrative example, a log-domain filter is analyzed. Applying this method to an abstract topology, bounds for signal-to-noise ratio are derived for a class of instantaneous companding filters, when total capacitance or total power are limited.  相似文献   
4.
A technique that enables the variation of bias currents in a filter without causing disturbances at the output is presented. Thus, the bias current can be kept at the minimum value necessary for the total input signal being processed, reducing the noise and power consumption. To demonstrate this approach, a dynamically biased log-domain filter has been designed in a 0.25-μm BiCMOS technology. The chip occupies 0.52 mm2. In its quiescent condition, the filter consumes 575 μW and has an output noise of 4.4 nA rms. Signal-to-noise ratio greater than 50 dB over 3 decades of input and total harmonic distortion less than 1% for inputs less than 2.5 mA peak are achieved. The bias can be varied to minimize noise and power consumption without disturbing the output  相似文献   
5.
The simulation of mixed switched-capacitor/digital (SC/D) networks containing capacitors, independent and linear-dependent voltage sources, switches controlled either by periodic or nonperiodic Boolean signals, latched comparators, and logic gates is considered. A unified linear switched-capacitor network (SCN) and mixed SC/D network simulator, SWITCAP2, and its applications to several widely used and novel nonlinear SCNs are discussed. The switches may be controlled by periodic waveforms and by nonperiodic waveforms from the outputs of comparators and logic gates. The signal-dependent modification of network topology through the comparators, logic gates, and signal-driven switches makes the modeling of various nonlinear switched-capacitor circuits possible. Simulation results for a pulse-code modulation (PCM) voice encoder, a sigma-delta modulator, a neural network, and a phase-locked loop (PLL) are presented to demonstrate the flexibility of the approach  相似文献   
6.
This paper discusses design techniques for integrated active LC filters. Issues related to prototype selection, Q enhancement, and automatic tuning are considered. Two designs, both of which are automatically tuned fourth-order bandpass filters in the 2 GHz range, were implemented to demonstrate the proposed techniques and to evaluate the potential of such filters. Measurement results show that modest dynamic range, suitable for certain stages in transmitter applications, is achieved, along with stable response thanks to the on-chip automatic tuning system.  相似文献   
7.
R-MOSFET structure based on current division   总被引:1,自引:0,他引:1  
A parallel-path combination of resistors and MOSFETs is proposed for use in integrated continuous-time filters and other circuits. The technique allows continuous incremental tuning while maintaining significantly better linearity than MOSFET-only structures.<>  相似文献   
8.
Tsividis  Y. 《Electronics letters》1981,17(12):406-407
A scheme for the tuning of filters is proposed. In it, filters are time-shared between a signal path and a tuning path, so that each filter in a system is individually tuned. An accurate system frequency response can thus be achieved which does not rely on tight matching between filters.  相似文献   
9.
The electrical properties of a six-terminal MOSFET are studied and a strong-inversion model is derived. Due to its special structure, the six-terminal MOSFET can be operated as a highly-linear, electronically-tunable resistor. This is managed by applying proper voltages at the terminals of the structure, achieving channel uniformity independent of applied signals. Measurements on fabricated test devices yield distortion levels of -90 dB for 1 Vp-p signals  相似文献   
10.
Design considerations are presented for attaining accurate output balancing in fully differential operational amplifiers over the useful operating frequency of the differential signals. Such output balancing is obtained by merging the common-mode feedback and the differential gain paths as close to the front end of the amplifier as possible, ensuring maximum sharing of circuit components. Two circuit designs implemented in a 5-V, 1.75-μm process are presented, one based on a two-stage topology and one based on a folded cascode topology. Experimental results for both designs are given  相似文献   
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