Programmable analogue VLSI implementation for asymmetric sigmoid neural activation function and its derivative

A new CMOS VLSI implementation of an asymmetric programmable sigmoid neural activation function, as well as of its derivative, is presented. It consists of two coupled PMOS and NMOS differential pairs with different programmable bias currents that set the upper and lower limits of the sigmoid. The circuit works in the weak inversion region, for low power consumption and exponential envelope, or in strong inversion to achieve higher speeds. The results obtained from the theoretical transfer function, and from the simulations of the circuit implemented in AMI's 0.35 /spl mu/m technology, show a very good match.     

Freeman olfactory cortex model: A multiplexed KII network implementation

This paper presents the results of a CMOS-VLSI implementation of a realistic computational model proposed by Walter Freeman for the olfactory system. This model, in later years, has been studied for engineering applications such as auto-association and classification. The analogue nature of the model motivates analogue VLSI implementations. However, the dimension and complexity of such system poses many obstacles to an analogue electronic implementation; one such is the massive interconnectivity which size increases with the square of the number of inputs (channels). We suggest a multiplexing procedure that puts the burden of interconnectivity over a digital system that is simpler to design and makes the analogue system more treatable. The procedure naturally samples the signals. To avoid smoothing filters, a discrete-time solution was also employed. Although with such approach the time resolution is reduced, the advantages overcome the detriments. Previous work has shown that the model can be efficiently discretized using DSP techniques, resulting on a system that is able to predict, on sample-by-sample basis, the behaviour of the VLSI circuit, allowing for a simple and flexible way to adjust the circuit parameters. We present the measured circuit results that are further confronted with the digital implementation.