Influence of uniaxial tensile strain on the performance of partially depleted SOI CMOS ring oscillators

The influence of uniaxial tensile strain on the performance of advanced partially depleted silicon-on-insulator CMOS ring oscillators is reported. Strain is applied either perpendicular or parallel to the direction of current flow by bending of thinned, fully processed wafers with a gate oxide thickness of less than 1.5 nm. Interestingly, the standby power dissipation of the ring oscillators increases for both parallel and perpendicular strains due to changes in the gate tunneling currents with strain. The on-state power dissipation decreases with parallel strain and increases with perpendicular strain consistent with the expected changes in the inversion layer piezoresistance. The speed of the ring oscillators improves with perpendicular strain and degrades with parallel strain, which can also be understood in terms of the piezoresistance changes.     

Opposing dependence of the electron and hole gate currents in SOI MOSFETs under uniaxial strain

The influence of tensile mechanical stress on ultrathin oxide gate currents in advanced partially depleted silicon-on-insulator MOSFETs is reported. Strain is applied uniaxially, perpendicular to the direction of current flow by bending of thinned, fully processed wafers with a gate oxide thickness of less than 1.5 nm. The gate currents of the n-channel and p-channel MOSFETS are found to change linearly and in opposite (opposing) directions as a function of uniaxial strain. The nMOS transistors generally exhibit a decrease with applied tensile strain, while the nMOS transistors show increasing gate current with strain. The observed dependences are consistent with a gate current controlled by direct tunneling and perturbed by stress-induced changes in the energy band structure.     

Integration of resonant-tunneling transistors and hot-electrontransistors

We have integrated a tunneling hot-electron transfer amplifier (THETA) and a novel resonant-tunneling hot-electron transfer amplifier (RTHETA) within a single epitaxial growth. At room temperature, the THETA exhibits a common-emitter current gain of greater than six and a voltage swing of 800 mV when measured in an inverter configuration. The RTHETA exhibits similar common-emitter current gain and a four-state voltage transfer characteristic with an output voltage swing of 1 V. In contrast to the resonant-tunneling hot-electron transistor (RHET), the RTHETA exhibits current gain both before and after the resonant peak voltage. From on-wafer S-parameter measurements, the current-gain cut-off frequency (f_T) and the maximum frequency of oscillation f_max) for both transistors are approximately 20 GHz and 9 GHz, respectively     

Epitaxially grown Si resonant interband tunnel diodes exhibitinghigh current densities

This study presents the room-temperature operation of δ-doped Si resonant interband tunneling diodes which were fabricated by low-temperature molecular beam epitaxy. Post growth rapid thermal annealing of the samples was found to improve the current-voltage (I-V) characteristics. Optimal performance was observed for a 600°C 1 min anneal, yielding a peak-to-valley current ratio (PVCR) as high as 1.38 with a peak current density (J_p) as high as 1.42 kA/cm² for a device with a 4-nm intrinsic Si tunnel barrier. When the tunnel barrier was reduced to 2 nm, a PVCR of 1.41 with a J_p as high as 10.8 kA/cm² was observed. The devices withstood a series of burn-in measurements without noticeable degradation in either the J_p or PVCR. The structures presented are strain-free, and are compatible with a standard CMOS or HBT process     

W5O14 Nanowires

We report on the synthesis of quasi‐1D W₅O₁₄ crystals using NiI₂ as a growth promoter. Photoelectron spectroscopy revealed the metallic conductivity of the W₅O₁₄ nanowires, which was also confirmed by direct‐transport measurements on a double‐stranded nanowire. Scanning electron microscopy and transmission electron‐diffraction data are correlated with details of crystal growth revealing the possible mechanism of the formation of this rarely synthesized phase, which was reported as a homogeneous phase only in 1978 by McColm et al., and in the meantime has been declared as a compound that is rare.     

Modeling Anisotropic Single Crystal Growth Kinetics in Liquid Phase Sintered α-Al2O3

Single crystals of -alumina with {0001}, {11 and {01 2} orientations were embedded in a matrix of liquid phase sintered alumina to study -alumina single crystal growth in the presence of a calcium aluminosilicate liquid. Growth on the {11 0} and {01 2} surfaces was observed to occur by a diffusion-controlled mechanism while growth on the basal surface was controlled by two-dimensional nucleation. Growth models, which incorporate the change in matrix grain size, were derived and shown to fit the growth kinetics.     

Co-integration of resonant tunneling and double heterojunctionbipolar transistors on InP

The authors report the first co-integration of resonant tunneling and heterojunction bipolar transistors. Both transistors are produced from a single epitaxial growth by metalorganic molecular beam epitaxy, on InP substrates. The fabrication process yields 9-μm²-emitter resonant tunneling bipolar transistors (RTBTs) operating at room temperature with peak-to-valley current ratios (PVRs) in the common-emitter transistor configuration, exceeding 70, at a resonant peak current density of 10 kA/cm², and a differential current gain at resonance of 19. The breakdown voltage of the In_0.53Ga_0.47As-InP base/collector junction, V_CBO, is 4.2 V, which is sufficient for logic function demonstrations. Co-integrated 9-μm²-emitter double heterojunction bipolar transistors (DHBTs) with low collector/emitter offset voltage, 200 mV, and DC current gain as high as 32 are also obtained. On-wafer S-parameter measurements of the current gain cutoff frequency (f_T) and the maximum frequency of oscillation (f_max) yielded f _T and f_max values of 11 and 21 GHz for the RTBT and 59 and 43 GHz for the HBT, respectively     

Improved turn-on characteristics of a hot electron transistor at300 K

Through compositional grading of the collector, we have significantly reduced both the offset and saturation voltage of a tunneling hot-electron transfer amplifier relative to a similar transistor with a fixed composition collector structure. In the absence of a collector-base voltage, the electric field produced by the compositional grading improves the collection efficiency of ballistic electrons transported across the base     

Coupled-quantum-well field-effect resonant tunneling transistor formulti-valued logic/memory applications

A vertical field-effect resonant tunneling transistor is demonstrated consisting of a triple-barrier, double-well resonant tunneling diode (3bRTD) that can be depleted by the action of side gates. The 3bRTD features a double peak current-voltage characteristic in which the second valley current is less than the first valley current. Combination of the resonant tunneling transistor and a constant current load is shown to yield both binary and ternary logic and memory functions