Positive temperature dependence of the electron impact ionizationcoefficient in In0.53Ga0.47As/InP HBTs

Impact ionization is a major limiting factor to the maximum operating voltage of InGaAs-based, high-speed transistors. In this work, data on the positive temperature dependence of the electron impact ionization coefficient α_n in In_0.53Ga_0.47As at medium-low electric fields are reported for the first time. The increase of α_n with temperature is opposite to the behavior normally observed in most semiconductors. This anomalous behavior implies the onset of a positive feedback between power dissipation and avalanche generation which may adversely affect the power handling capability of In_0.53Ga _0.47As-based devices, and which should be taken into account in device thermal modeling. In the experimental procedure, based on the measurement of the multiplication factor M-1 in npn In_0.53Ga _0.47As/InP Heterojunction Bipolar Transistors (HBT), particular care has been taken in order to rule out possible spurious, temperature-dependent contributions to the measured multiplication current     

A fully integrated dual-channel log-domain programmable preamplifier and filter for an implantable cardiac pacemaker

A programmable-gain preamplifier and filter for detection of spontaneous heart activity in an implantable cardiac pacemaker is presented. The system is fully integrated in a standard 0.35-/spl mu/m CMOS technology, including all auxiliary circuits. Two channels are available in order to process both atrial and ventricular signals. CMOS translinear circuits, with particular emphasis on log-domain techniques, have been exploited in order to contain current consumption and to allow correct operation with a reduced supply voltage, due to battery discharging. Indeed, the realized system can operate down to 1.8 V of supply voltage and dissipates at most 1.8 /spl mu/A, granting at least 47 dB of dynamic range (DR) for the atrial chain, which is compatible with advanced digital sensing. Current consumption can be further reduced at the expense of DR if a simpler sensing like peak detection is adopted. All system performance have been verified by measurements results and are compatible with the requirements of cardiac pacemakers. This work, therefore, demonstrates how a proper design approach, exploiting low-power and low-voltage techniques, allows one to optimize performance for the cardiac pacemaker.     

A 0.35-/spl mu/m CMOS analog turbo decoder for the 40-bit rate 1/3 UMTS channel code

This work presents the design and the test results of an analog decoder for the 40-bit block length, rate 1/3, Turbo Code defined in the UMTS standard. The prototype is fully integrated in a three-metal double-poly 0.35-/spl mu/m CMOS technology, and includes an I/O interface that maximizes the decoder throughput. After the successful implementation of proof-of-concept analog iterative decoders by different research groups in both bipolar and CMOS technologies, this is the first reported prototype of an analog decoder for a realistic error-correcting code. The decoder was successfully tested at the maximum data rate defined in the standard (2 Mb/s), with an overall power consumption of 10.3 mW at 3.3 V, going down to 7.6 mW with the decoder core operated at 2 V, and an extremely low energy per decoded bit and trellis state (0.85 nJ for the decoder core alone).     

CMOS implementation of all-analogue APP decoders: analysis ofperformances and limitations

The potential performances and limitations of an all-analogue implementation of a posteriori-probability (APP) decoders in a standard complementary-metal-oxide semiconductor (CMOS) technology are investigated. In particular, the accuracy and speed trade-off related to the usage of MOS transistors in the weak inversion (w.i) region is analysed in depth. Transistor level simulations of a (18, 9, 5) tail-biting decoder are reported and contrasted with the results of the software implementation of the same decoding algorithm     

A fully integrated two-channel A/D interface for the acquisition of cardiac signals in implantable pacemakers

This work presents an input stage for a cardiac pacemaker fully integrated in 0.35-/spl mu/m CMOS technology. The system can acquire and digitize to 8 bits both atrial and ventricular electrical activity. Log-domain circuits are exploited to amplify and filter the input signal, while /spl Sigma//spl Delta/ modulation is exploited to convert it. The design is power optimized, indeed the current consumption is limited to 2.9 /spl mu/A, while the power supply ranges from 2.8 to 1.8 V. The total area is 2.2 mm/sup 2/ and experimental data prove correct filtering and a total dynamic range of at least 47 dB.     

Experimental and Monte Carlo analysis of impact-ionization inAlGaAs/GaAs HBT's

We present a detailed experimental and theoretical investigation of hot electron effects occurring in AlGaAs/GaAs Heterojunction Bipolar Transistors (HBT's) operating at low current densities. Electrons heated by the strong electric field at the base-collector junction give rise to impact ionization and light emission. A new general purpose weighted Monte Carlo procedure has been developed to study such effects. The importance of dead-space effects on the multiplication factor of the device is demonstrated. Good agreement is found between theory and experiment     

Impact of unrealistic worst case modeling on the performance ofVLSI circuits in deep submicron CMOS technologies

The impact of process fluctuations on the variability of deep submicron (DSM) very large scale integration (VLSI) circuit performances is investigated in this paper. In particular, we show that as process dimensions stale down in the subhalfmicron region, the relative weight of process variability tends to increase, thus wearing down a non negligible portion of the benefits that are expected from minimum feature size scaling. We still show that in order to better exploit the advance of process technology, it is essential to adopt a realistic approach to worst case modeling [assigned probability technique (APT)]. The application of the APT technique to different test circuits designed in 0.35, 0.25, and 0.18 μm CMOS technologies with a power supply ranging from 3.3 V down to 1 V will demonstrate how the manufacturability of DSM designs is going to be a vital factor for the successful implementation of high-performance or low-power systems in 0.18 μm and lesser technologies     

Study of the oligopeptide fraction in Grana Padano and Parmigiano-Reggiano cheeses by liquid chromatography electrospray ionization mass spectrometry

The oligopeptide fractions of Grana Padano and Parmigiano Reggiano cheese samples, at various stages of ageing (6, 12, 18 and 24 months), were analysed by means of high-performance liquid chromatography coupled to electrospray ionisation mass spectrometry (ESI-MS). The main oligopeptides (< 5000 Da) present in the samples were extracted by using an originally developed method which allowed good enrichment of the oligopeptide fractions and identified according to their molecular weights. The casein sequences compatible with the found molecular weights were determined and the exact oligopeptide sequences were identified by using the fragmentation peaks originated by in-source collisionally-induced dissociation (CID). The ESI-MS method reported here allowed the sequence identification of oligopeptides very quickly with a single liquid chromatography-mass spectrometry run. Oligopeptides were also semi-quantified by comparison with a suitable internal standard (the dipeptide phenylalanyl-phenylalanine, Phe-Phe). This methodology demonstrated that, as far as the main oligopeptides are concerned, Grana Padano and Parmigiano Reggiano presented very similar composition. Anyway, the evolution of the fractions during ageing time was characteristically distinct among the two cheeses: in Grana Padano cheeses most of the oligopeptides reached a maximum at 12 months of ageing and then decreased, whereas in Parmigiano Reggiano cheeses the oligopeptide amounts were usually lower and had a less regular trend. The reason for this different behaviour may be ascribed to the different production techniques.     

Degradation mechanisms in polysilicon emitter bipolar junction transistors for digital applications

This paper is a thorough overview on polysilicon bipolar junction transistors’ (BJTs) reliability, with focus on transistors for digital applications, where the base–emitter junction switches from forward to reverse bias (low fields) and the base–collector junction is reverse biased at high fields. The effects of base–emitter reverse biasing are generation, charging and discharging of traps in silicon oxide or at the Si–SiO₂ interface near the base–emitter junction; their understanding is essential to model transistor current gain degradation and low frequency noise increase. Failure modes and mechanisms, degradation kinetics, lifetime models and physical phenomena related to device aging will be discussed. The base–emitter junction is also stressed by high currents, which lead, for example, to electromigration phenomena. The base–collector junction degradation is mainly due to high field and impact-ionization effects. Reliability constraints are now an important component of a correct design methodology in deep-sub-micron integrated circuits.     

A 1.8-/spl mu/W sigma-delta modulator for 8-bit digitization of cardiac signals in implantable pacemakers operating down to 1.8 V

Implantable biomedical devices can highly benefit from submicrometer CMOS technologies both in terms of duration-time increase and size shrinking. This work shows how design techniques for submicrometer CMOS technologies lead to improvements in the sensing stage of a cardiac implantable pacemaker. A sigma-delta modulator is presented for 8-bit quantization of the natural electrical activity of the heart, fabricated in a 0.8-/spl mu/m CMOS technology. The low-voltage, low-power design procedure employs switched-opamp and weak inversion CMOS circuits. Measurement results confirm a power dissipation of 1.8 /spl mu/W, a minimum supply voltage of 1.8 V, and more than 50 dB of dynamic range.