The Effects of Scaling and Bias Configuration on Operating-Voltage Constraints in SiGe HBTs for Mixed-Signal Circuits

This paper presents a comprehensive picture of operating-voltage constraints in SiGe heterojunction bipolar transistors, addressing breakdown-related issues as they relate to technology generation, bias configuration, and operating-current density. New definitions for breakdown voltage, adopted from standard measurements, are presented. Practical design implications and physical origins of breakdown are explored using calibrated 2-D simulations and quasi-3-D compact models. Device-level analysis of ac instabilities and power performance, which is relevant to mixed-signal circuit design, is presented, and implications of the relaxed voltage constraints for common-base operation are explored.     

On Common–Base Avalanche Instabilities in SiGe HBTs

This paper presents a detailed investigation of the key device-level factors that contribute to the bias-dependent features observed in common-base (CB) dc instability characteristics of advanced SiGe HBTs. Parameters that are relevant to CB avalanche instabilities are identified, extracted from measured data, and carefully analyzed to yield improved physical insight, a straightforward estimation methodology, and a practical approach to quantify and compare CB avalanche instabilities. The results presented support our simple theory and show that CB-instability characteristics are strongly correlated with the parasitic base and emitter resistances. The influence of weak quasi-pinch-in effects are shown to contribute additional complexity to the bias dependence of the CB-instability threshold. Measured data from several technology nodes, including next-generation (300-GHz) SiGe HBTs, are presented and compared. Experimental analysis comparing different device geometries and layouts shows that while device size plays an important role in CB avalanche instabilities across bias, these parameters are not sensitive to standard transistor layout variations. However, novel measurements on emitter-ring tetrode transistor structures demonstrate the influence of perimeter-to-area ratio on CB stability and highlight opportunities for novel transistor layouts to increase .     

Compact Modeling of Mutual Thermal Coupling for the Optimal Design of SiGe HBT Power Amplifiers

Most bipolar-transistor compact models incorporate some level of self-heating capability in order to determine the impact of thermal effects on circuit performance. Techniques for predicting mutual-thermal-coupling effects, however, are not readily available within most commercial CAD platforms. Presented in this brief is a technique which allows for the easy modification of design-kit-supplied models to predict and optimize mutual thermal coupling using commonly available CAD tools such as Cadence and Spectre.