Reliability investigation of 0.07-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel

The authors have investigated the reliability performance of G-band (183 GHz) monolithic microwave integrated circuit (MMIC) amplifiers fabricated using 0.07-/spl mu/m T-gate InGaAs-InAlAs-InP HEMTs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel on 3-in wafers. Life test was performed at two temperatures (T/sub 1/ = 200 /spl deg/C and T/sub 2/ = 215 /spl deg/C), and the amplifiers were stressed at V/sub ds/ of 1 V and I/sub ds/ of 250 mA/mm in a N/sub 2/ ambient. The activation energy is as high as 1.7 eV, achieving a projected median-time-to-failure (MTTF) /spl ap/ 2 /spl times/ 10/sup 6/ h at a junction temperature of 125 /spl deg/C. MTTF was determined by 2-temperature constant current stress using /spl Delta/G/sub mp/ = -20% as the failure criteria. The difference of reliability performance between 0.07-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel and 0.1-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with In/sub 0.6/Ga/sub 0.4/As channel is also discussed. The achieved high-reliability result demonstrates a robust 0.07-/spl mu/m pseudomorphic InGaAs-InAlAs-InP HEMT MMICs production technology for G-band applications.     

IMPACCT: Methodology and Tools for Power-Aware Embedded Systems

Power-aware systems are those that must exploit a widerange of power/performance trade-offs in order to adapt to the power availabilityand application requirements. They require the integration of many novel powermanagement techniques, ranging from voltage scaling to subsystem shutdown.However, those techniques do not always compose synergistically with eachother; in fact, they can combine subtractively and often yield counterintuitive,and sometimes incorrect, results in the context of a complete system. Thiscan become a serious problem as more of these power aware systems are beingdeployed in mission critical applications.To address the problem of technique integration for power-aware embedded systems, we propose a new design tool framework called IMPACCT and the associated design methodology. The system modeling methodology includes application model for capturing timing/powerconstraints and mode dependencies at the system level. The tool performs power-awarescheduling and mode selection to ensure that all timing/power constraintsare satisfied and that all overhead is taken into account. IMPACCT then synthesizesthe implementation targeting a symmetric multiprocessor platform. Experimentalresults show that the increased dynamic range of power/performance settingsenabled a Mars rover to achieve significant acceleration while using lessenergy. More importantly, our tool correctly combines the state-of-the-arttechniques at the system level, thereby saving even experienced designersfrom many pitfalls of system-level power management.     

Minimum-energy multicast in mobile ad hoc networks using network coding

The minimum energy required to transmit one bit of information through a network characterizes the most economical way to communicate in a network. In this paper, we show that, under a layered model of wireless networks, the minimum energy-per-bit for multicasting in a mobile ad hoc network can be found by a linear program; the minimum energy-per-bit can be attained by performing network coding. Compared with conventional routing solutions, network coding not only allows a potentially lower energy-per-bit to be achieved, but also enables the optimal solution to be found in polynomial time, in sharp contrast with the NP-hardness of constructing the minimum-energy multicast tree as the optimal routing solution. We further show that the minimum energy multicast formulation is equivalent to a cost minimization with linear edge-based pricing, where the edge prices are the energy-per-bits of the corresponding physical broadcast links. This paper also investigates minimum energy multicasting with routing. Due to the linearity of the pricing scheme, the minimum energy-per-bit for routing is achievable by using a single distribution tree. A characterization of the admissible rate region for routing with a single tree is presented. The minimum energy-per-bit for multicasting with routing is found by an integer linear program. We show that the relaxation of this integer linear program, studied earlier in the Steiner tree literature, can now be interpreted as the optimization for minimum energy multicasting with network coding. In short, this paper presents a unifying study of minimum energy multicasting with network coding and routing.     

On the hysteresis of vortex shedding in a periodically-varying flow

Efforts are made to explore the hysteresis characteristics of vortex shedding in a pipe flow, whose velocity varies periodically in time. Results obtained show that during acceleration of the flow, the vortex strength tends to be stronger, whereas during deceleration of the flow, the situation is reversed. As reconstructed from the velocity signals measured at a point in the flow field, the shed vortex arrays appear to possess uneven vortex strengths in response to periodically-varying incoming flows. Furthermore, in the hysteresis range, the streamwise spacings between the vortices appear to be unequal.     

Dynamic programming implementation on array processor architectures

Dynamic Programming (DP) applies to many signal and image processing applications including boundary following, the Viterbi algorithm, dynamic time warping, etc. This paper presents an array processor implementation of generic dynamic programming. Our architecture is a SIMD array attached to a host computer. The processing element of the architecture is based on an ASIC design opting for maximum speed-up. By adopting a torus interconnection network, a dual buffer structure, and a multilevel pipeline, the performance of the DP chip is expected to reach the order of several GOPS. The paper discusses both the dedicated hardware design and the data flow control of the DP chip and the total array.This work was supported in part by the NATO, Scientific and Environmental Affairs Division, Collaborative Research Grant SA.5-2-05(CRG.960201)424/96/JARC-501.     

Hermetic Packaging Using Eutectic SnPb Solder and Cr/Ni/Cu Metallurgy Layer

We have developed an easy, low-cost, and low-temperature optoelectronic hermetic packaging technology utilizing the eutectic SnPb solder and the Cr/Ni/Cu bonding pad. Bonding characteristics of the design were investigated in three different setups: silicon-silicon, silicon-glass, and glass-glass samples. Hermeticity was achieved at 200 degC without flux for all samples during the final bonding process. The bonding pads did not dewet during or after the reflow process. By utilizing the eutectic SnPb solder, the self-alignment process can be achieved. Because the bonding process was conducted through visual alignment, original misalignment was estimated to be more than 100 mum. The surface tension of melting solder during the reflow process allowed the samples to self-align and obtain a misalignment of less than 20 mum after solidification, which was 4% of the entire solder width. The bonding strength of the three setups ranged from 3 to 10 MPa. Among the three setups, glass-glass samples appear to have the strongest bonding strength. This low-temperature and cost-effective soldering process has demonstrated its feasibility and potential utilization in optoelectronic packaging     

On Striping Traffic over Multiple IEEE 802.11(b) Wireless Channels

Due to interference, path loss, multipath fading, background noise, and many other factors, wireless communication normally cannot provide a wireless link with both a high data rate and a long transmission range. To address this problem, striping network traffic in parallel over multiple lower-data-rate but longer-transmission-range wireless channels may be used. In this paper, we propose a new striping method and evaluate its performances over multiple IEEE 802.11(b) channels under various conditions. Our extensive simulation results show that this method is quite effective for such an application. S.Y. Wang is an Associate Professor of the Department of Computer Science and Information Engineering at National Chiao Tung University, Taiwan. He received his Master and Ph.D. degree in computer science from Harvard University in 1997 and 1999, respectively. His research interests include wireless networks, Internet technologies, network simulations, and operating systems. He is the author of the NCTUns 2.0 network simulator and emulator, which is being widely used by network and communication researchers. More information about the tool is available at http://NSL.csie.nctu.edu.tw/nctuns.html. C.H. Hwang received his master degree in computer science from NCTU in 2002 and currently is working for a network company. C.L. Chou currently is a third-year Ph.D. student at the Department of Computer Science and Information Engineering, National Chiao TungUniversity (NCTU), Taiwan. He received his master degree in computer science from NCTU in 2002.     

LT348电路的研制

本文介绍了ＬＴ３４８的电路、版图和工艺设计。ＬＴ３４８是由四个功能和７４１组件等同而又各自独立的高增益、内补偿、低功耗运放器组成，并且它的电源电流可以和单个的７４１典型运放器相比拟。此外，它还具有比标准７４正低得多的输入失调电流和输入偏流的特征。