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A half-flash, subranging, 8-b, 13.5-MHz, video ADC (analog-to-digital converter) using overlapped architecture that combines the advantages of both flash and half-flash converters is described. Its conversion rate is that of a flash, without any multiplexing and with a low number of comparators. Its low power consumption and the small silicon area required for its implementation enable it to be integrated in mixed digital/analog circuits such as a video acquisition circuit devoted to visiophony applications. It has been manufactured using a CMOS 1-μm technology with two polysilicon and two metallization layers  相似文献   
2.
Morphological Component Analysis (MCA) is a new method which takes advantage of the sparse representation of structured data in large overcomplete dictionaries to separate features in the data based on the diversity of their morphology. It is an efficient technique in such problems as separating an image into texture and piecewise smooth parts or for inpainting applications. The MCA algorithm consists of an iterative alternating projection and thresholding scheme, using a successively decreasing threshold towards zero with each iteration. In this article, the MCA algorithm is extended to the analysis of spherical data maps as may occur in a number of areas such as geophysics, astrophysics or medical imaging. Practically, this extension is made possible thanks to the variety of recently developed transforms on the sphere including several multiscale transforms such as the undecimated isotropic wavelet transform on the sphere, the ridgelet and curvelet transforms on the sphere. An MCA-inpainting method is then directly extended to the case of spherical maps allowing us to treat problems where parts of the data are missing or corrupted. We demonstrate the usefulness of these new tools of spherical data analysis by focusing on a selection of challenging applications in physics and astrophysics.  相似文献   
3.
This paper describes a new generation of contactless smart card chip which integrates an on-chip coil connected to a power reception system and an emitter/receiver module compatible with the ISO 14443 standard, together with an asynchronous quasi-delay insensitive (QDI) 8-bit microcontroller. Beyond the contactless smart card application field, this new chip demonstrates that system-on-chip integrating power reception and management, radio-frequency communication, and signal processing is feasible. It associates analog/digital parts as well as synchronous/asynchronous logics and has been fabricated in a CMOS six metal layers 0.25-μm technology from STMicroelectronics  相似文献   
4.
The authors describe a circuit intended for the restitution of a digital video signal into its analog red, green, and blue components. Sampling parameters according to CCIR recommendation 601 have been adopted for the digital interface. The circuit consists mainly of a complex digital processing part and three digital-to-analog converters. All of these functions have been implemented in a 38-mm2 CMOS chip. The design goal was achieved by the development of an efficient 2-μm CMOS technology dedicated to analog and digital applications  相似文献   
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