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铜电镀工艺后表面的不平整度通常取决于版图关键特征,包括线宽,线间距和金属密度。本文设计了一款测试芯片并在一家半导体厂加工制造。版图特征效应被真正的测试数据所检查和验证。通过分析金属蝶形、介质腐蚀、金属厚度和SEM照片,得出一些结论。线宽是决定表面形貌及产生铜金属蝶形和介质层腐蚀的最关键因素。经过铜电镀工艺发现,铜线越细铜生长的越厚,铜线越宽铜金属蝶形越大,发现了3种典型表面形貌。而且,通过测试数据,量化版图特征的影响并用曲率增强加速剂覆盖率的理论解释,这可以用于开发铜电镀工艺模型和开展可制造性设计研究。 相似文献
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A layout-pattern-dependent electroplating model is developed based on the physical mechanism of the electroplating process.Our proposed electroplating model has an advantage over former ones due to a consideration of the variation of copper deposition rate with different layout parameters during the process.The simulation results compared with silicon data demonstrate the improvement in accuracy. 相似文献
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薄膜体声波滤波器(FBAR)作为一种无源、体积小和耐功率高的器件,被广泛应用于射频信号处理中。晶圆级气密封装作为小型化封装的代表,在各种高可靠性应用场景中占据重要地位。金-金键合和金-锡键合被广泛应用于薄膜体声波滤波器的气密性晶圆级封装中,但金-锡键合在工艺上更易实现。该文针对金-锡键合在气密性晶圆级封装中的应用进行了研究,在保证键合强度的情况下制作了3 GHz滤波器样品,其性能测试一致性良好,可靠性达到要求。 相似文献
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铜化学机械抛光受几何图形特性如线宽、间距和图形密度的影响,芯片和晶圆上铜互连线厚度的不均匀性都会影响电性能和降低良率。本文从物理化学的角度对CMP工艺进行了回顾和分析,针对Cu CMP制造工艺和在MIT提出的(Pattern-Density Step-Height,PDSH)模型基础上,建立与工艺相对应的三步骤工艺模型。为了扑捉工艺与版图结构的相关性,设计了一款65纳米测试芯片并在SMIC完成工艺实验。按照模型参数提取流程,通过芯片测试数据提取模型参数和验证工艺模型。模拟结果与测试结果对比说明二者趋势完全一致,最大偏差小于5 nm。第三方测试数据进一步证明模型参数优化取得很好的结果。精准的Cu CMP工艺模型可以用于做芯片的DFM检查、显示和消除关键热点,从而确保芯片的良率和集成电路量产能力。 相似文献
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The non-planarity of a surface post electroplating process is usually dependent on variations of key layout characteristics including line width,line spacing and metal density.A test chip is designed and manufactured in a semiconductor foundry to test the layout dependency of the electroplating process.By checking test data such as field height,array height,step height and SEM photos,some conclusions are made.Line width is a critical factor of topographical shapes such as the step height and height difference.After the electroplating process,the fine line has a thicker copper thickness,while the wide line has the greatest step height.Three typical topographies, conformal-fill,supper-fill and over-fill,are observed.Moreover,quantified effects are found using the test data and explained by theory,which can be used to develop electroplating process modeling and design for manufacturability (DFM) research. 相似文献
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With the use of a chemical-mechanical polishing(CMP)simulator verified by testing data from a foundry,the effect of dummy fill characteristics,such as fill size,fill density and fill shape,on CMP planarity is analyzed.The results indicate that dummy density has a significant impact on oxide erosion,and copper dishing is in proportion to dummy size.We also demonstrate that cross shape dummy fill can have the best dishing performance at the same density. 相似文献
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Copper chemical mechanical polishing (CMP) is influenced by geometric characteristics such as line width and pattern density, as well as by the more obvious parameters such as slurry chemistry, pad type, polishing pressure and rotational speed. Variations in the copper thickness across each die and across the wafer can impact the circuit performance and reduce the yield. In this paper, we propose a modeling method to simulate the polishing behavior as a function of layout pattern factors. Under the same process conditions, the pattern density, the line width and the line spacing have a strong influence on copper dishing, dielectric erosion and topography. The test results showed: the wider the copper line or the spacing, the higher the copper dishing; the higher the density, the higher the dielectric erosion; the dishing and erosion increase slowly as a function of increasing density and go into saturation when the density is more than 0.7. 相似文献
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