一种用于MEMS电容式加速度计的116dB动态范围CMOS读出电路

A high stability in-circuit reprogrammable technique control system for a capacitive MEMS accelerometer is presented. Modulation and demodulation are used to separate the signal from the low frequency noise. A low-noise low-offset charge integrator is employed in this circuit to implement a capacitance-to-voltage converter and minimize the noise and offset. The application-specific integrated circuit （ASIC） is fabricated in a 0.5 /μm one-ploy three-metal CMOS process. The measured results of the proposed circuit show that the noise floor of the ASIC is -116 dBV, the sensitivity of the accelerometer is 66 mV/g with a nonlinearity of 0.5%. The chip occupies 3.5×2.5 mm2 and the current is 3.5 mA.     

多通道 １４ 位 １２５ＭＳＰＳ 流水线型 ＡＤＣ 设计

针对通信系统对多通道、高速、高精度数据转换器国产化的迫切需求,论文设计了一款基于流水线架构的八通道14位125MSPS模数转换器,采用多位量化增益数模单元实现了流水线的第一级子级和最后一级采用4位flash ADC,多位量化较好地抑制了后级电路的噪声和失真衰减。采样保持电路采用采样电容翻转式结构实现。电路采用SMIC 0.18μm CMOS工艺进行设计,测试结果表明,在输入信号频率为70MHz,采样速率为125MHz时,无杂散动态范围为87dB,信噪比为72.5dB,有效位数约为11.75比特。     

一款CAN总线收发器芯片的电路设计

文中完成一款应用于CAN总线的收发器芯片的电路设计.重点阐述了该收发器芯片的功能框图及其工作原理,特别是接收模块和过压保护的设计.该电路采用5V电源,驱动总线负载为R=60Ω、C=200pF.仿真结果表明该电路工作时的平均电流为35.7mA,电路总的延迟时间为160ns,具有较好的过压保护功能,可应用于高速CAN总线通讯中.