3-D simulation of angled strike heavy-ion induced charge collection in silicon–germanium heterojunction bipolar transistors

This paper presents 3-D simulation of angled strike heavy-ion induced charge collection in domestic silicon-germanium heterojunction bipolar transistors （SiGe HBTs）. 3D damaged model of SiGe HBTs single-event effects （SEE） is built by TCAD simulation tools to research ions angled strike dependence. We select several different strike angles at variously typical ions strike positions. The charge collection mechanism for each terminal is identified based on analysis of the device structure and simulation results. Charge collection induced by angled strike ions presents a complex situation. Whether the location of device ions enters, as long as ions track through the sensitive volume, it will cause vast charge collection. The amount of charge collection of SiGe HBT is not only related to length of ions track in sensitive volume, but also influenced by STI and distance between ions track and electrodes. The simulation model is useful to research the practical applications of SiGe HBTs in space, and provides a theoretical basis for the further radiation hardening.     

Lead zirconate titanate behaviors in an LDMOS

The behaviors of lead zirconate titanate (PZT) deposited as the dielectric for high-voltage devices are investigated experimentally and theoretically. The devices demonstrate not only high breakdown voltages above 350 V, but also excellent memory behaviors. A drain current-gate voltage (ID-VG) memory window of about 2.2 V is obtained at the sweep voltages of ±10 V for the 350-V laterally diffused metal oxide semiconductor (LDMOS). The retention time of about 270 s is recorded for the LDMOS through a controlled ID-VG measurement. The LDMOS with memory behaviors has potential to be applied in future power conversion circuits to boost the performance of the energy conversion system.     

OLED显示的灰度控制

阐述信息显示中实现灰度显示的基本原理。根据有机发光二极管的特性，从电气灰度调制、空间灰度调制及时间灰度调制三方面列举了当前有机电致发光器件实现灰度级显示的主要方法，并分析和比较了每种方法的工作机理和应用特点，在此基础上提出了利用可编程模拟器件控制灰度级的新想法。     

Gate-enclosed NMOS transistors

In order to quantitatively compare the design cost and performance of various gate styles,NMOS transistors with two-edged,annular and ring gate layouts were designed and fabricated by a commercial 0.35μm CMOS process.By comparing the minimum W/L ratios and transistor areas,it was found that either the annular layout or its ring counterpart incurs a higher area penalty that depends on the W/L ratio of the transistor to be designed. Furthermore,by comparing the output and transfer characteristics of the transistors and analyzing the popular existing methods for extracting the effective W/L ratio,it was shown that the mid-line approximation for annular NMOS could incur an error of more than 10%.It was also demonstrated that the foundry-provided extraction tool needs significant adaptation when being applied to the enclosed-gate transistors,since it is targeted only toward the two-edged transistor.A simple approach for rough extraction of the W/L ratio for the ring-gate NMOS was presented and its effectiveness was confirmed by the experimental results with an error up to 8%.     

Synergistic effects of total ionizing dose on single event upset sensitivity in static random access memory under proton irradiation

Nitrogen plasma passivation （NPP） on （111） germanium （Ge） was studied in terms of the interface trap density, roughness, and interfacial layer thickness using plasma-enhanced chemical vapor deposition （PECVD）. The results show that NPP not only reduces the interface states, but also improves the surface roughness of Ge, which is beneficial for suppressing the channel scattering at both low and high field regions of Ge MOSFETs. However, the interracial layer thickness is also increased by the NPP treatment, which will impact the equivalent oxide thickness （EOT） scaling and thus degrade the device performance gain from the improvement of the surface morphology and the interface passivation. To obtain better device performance of Ge MOSFETs, suppressing the interfacial layer regrowth as well as a trade-off with reducing the interface states and roughness should be considered carefully when using the NPP process.     

基于封闭形栅NMOS晶体管的研究

封闭形栅的NMOS晶体管广泛应用于总剂量辐射效应加固的电路中。为了定量比较不同的封闭形栅晶体管的性能以及设计代价,在0.35μm 商业CMOS工艺上设计制造了标准条栅和两种封闭形栅（包括环栅和半环栅）的NMOS晶体管。通过对比这三种器件的最小宽长比、晶体管面积,得出环栅与半环栅的版图形式带来的面积牺牲与设计的晶体管宽长比密切相关。并通过对这三种器件的输出特性和转移特性的对比测试,分析了常见的封闭形栅的有效宽长比提取方法,结果表明对于环栅NMOS,“中线近似”可能带来10%的误差,而商业工艺线提供的宽长比提取方法由于是针对条形栅,在设计中需要经过修正才能适用于封闭形栅的晶体管设计。对于半环栅NMOS,我们提出了一种简略的宽长比估算方法, 实验结果显示其误差小于8%。     

一款半定制可编程逻辑核的设计与验证

介绍了一款可编程逻辑核的设计及验证过程,着重阐述了可编程逻辑核电路设计及CAD设计技术。该可编程逻辑核采用半定制方法设计,在CSMC 0.5μm CMOS工艺上进行了流片,开发了相应的CAD工具以支持该可编程逻辑核的验证。硬件测试结果表明,该可编程逻辑核实现了预期的逻辑电路功能,达到了设计目的。     

锗硅异质结晶体管单粒子效应激光微束模拟

对国产锗硅异质结双极晶体管(SiGe HBT)进行了单粒子效应激光微束辐照试验,观测SiGe HBT单粒子效应的敏感区域,测试不同外加电压和不同激光能量下SiGe HBT集电极瞬变电流和电荷收集情况,并结合器件结构对试验结果进行分析。试验结果表明：国产SiGe HBT位于集电极/衬底结内的区域对单粒子效应敏感,波长为1064 nm的激光在能量约为1.5 nJ时诱发SiGe HBT单粒子效应,引起电流瞬变。入射激光能量增强,电流脉冲增大,电荷收集量增加;外加电压增大,电流脉冲的波峰增大;SiGe HBT的单粒子效应与外加电压大小和入射激光能量都相关,电压主要影响瞬变电流的峰值,而电荷收集量主要依赖于入射激光能量。     

基于环形栅和半环形栅N沟道金属氧化物半导体晶体管的总剂量辐射效应研究

在商用0.35 μm互补金属氧化物半导体工艺上制备了两种栅氧化层厚度(t_ox)的条形栅、环形栅和半环形栅N沟道金属氧化物半导体 (n-channel metal oxide semiconductor, 简记为NMOS) 晶体管, 并进行了2000 Gy(Si)的总剂量辐射效应实验. 实验结果显示, 栅氧厚度对阈值电压漂移的影响大于栅氧厚度的3次方. 对于t_ox为11 nm的低压NMOS晶体管, 通过环形栅或半环形栅的加固方式能将其抗总剂量辐射能力从300 Gy(Si)提高到2000 Gy(Si)以上; 而对于t_ox为26 nm的高压NMOS晶体管, 通过环栅或半环栅的加固方式, 则只能在低于1000 Gy(Si)的总剂量下, 一定程度地抑制截止漏电流的增加. 作为两种不同的版图加固方式, 环形栅和半环形栅对同一t_ox的NMOS器件加固效果类似, 环形栅的加固效果略优于半环形栅. 对于上述实验结果, 进行了理论分析并阐释了产生这些现象的原因. 关键词： 环形栅 半环形栅 总剂量 辐射效应     

R6G@γ-CD-MOFs复合物的制备及其在Fe3+离子传感中的应用

利用γ-环糊精（γ-CD）、氢氧化钾、甲醇和水,制备了γ-CD-MOFs,并使用X射线粉末衍射、热重分析和扫描电镜对其结构、稳定性和形貌进行表征。由于γ-CD-MOFs的结构中含有一维孔道,在其孔道中引入黄光发射的罗丹明6G （R6G）染料,获得了荧光复合材料R6G@γ-CD-MOFs,并探索了其对不同金属离子的荧光响应情况。实验结果表明,R6G@γ-CD-MOFs能够从12种金属离子中选择性传感Fe³⁺离子,在2×10^-4~2.0×10^-2 mol·L^-1范围内其荧光猝灭常数（K^sv）为1.03×10⁴ L·mol^-1。