SOI器件的增强短沟道效应模型

为了探索SOI器件总剂量辐照后阈值电压漂移量和沟道长度的关系,利用器件模拟软件ISE TCAD,对不同沟道长度的PDSOI NMOS管进行了总剂量辐照模拟.模拟结果表明,随着沟道长度的减小,背沟道MOS管阈值电压漂移越来越大,并且漂移量和辐照偏置密切相关,称此效应为SOI器件的增强短沟道效应.以短沟道效应理论为基础对此效应的机理进行了解释,并以短沟道效应模型为基础对此效应提出了一个简洁的阈值电压漂移模型,通过对ISE模拟结果进行曲线拟合对所提出的模型进行了验证.     

MOSFET迁移率增强技术

随着MOSFET特征尺寸的缩小,载流子的迁移率降低已成为器件性能衰退的主要因素之一,迁移率增强技术因此获得了广泛的研究和应用。衬底诱生应力、工艺诱生应力和采用不同的衬底晶向等三类方法都可以显著提高载流子的迁移率。文章综述了常见的几种迁移率增强技术。     

SPTC~+-IGBT characteristics and optimization

A novel advanced soft punch through(SPT) IGBT signed as SPTC-IGBT is investigated.Static and dynamic characteristics are simulated based on the 1200 V device structure and adopted technology.Extensive research on the structure optimization of SPTC-IGBT is presented and discussed.Compared with the structure of conventional IGBT,SPTC-IGBT has a much lower collector-emitter saturation voltage and better switching characteristics.Therefore it is very suitable for applications blocking a voltage higher than 3000 V.In addition,due to the improvement of switching speed achieved by using a thinner chip,SPTC-IGBT is also very competitive in 1200 V and 1700 V applications.     

Si (100) 表面 (NH4)2S 处理及其对Al/Si肖特基势垒的影响

The effect of Si （100） surface S passivation was investigated. A thick film with a high roughness value was formed on the Si surface treated by （NH4）2S solution, which was attributed to physical adsorption of S atoms. SEM and XPS analyses reveal that Si surface atoms were chemically bonded with S atoms after Si surface treatment in NH4OH and （NH4）2S mixing solution. This induces a more ideal value for the Schottky barrier height compared with a diode treated only by HF solution, indicating that surface states originating from dangling bonds are passivated with S atoms.     

Comparative studies of Ge and Si p-channel metal-oxide-semiconductor field-effect-transistors with HfSiON dielectric and TaN metal gate

Ge and Si p-channel metal--oxide--semiconductor field-effect-transistors (p-MOSFETs) with hafnium silicon oxynitride (HfSiON) gate dielectric and tantalum nitride (TaN) metal gate are fabricated. Self-isolated ring-type transistor structures with two masks are employed. W/TaN metal stacks are used as gate electrode and shadow masks of source/drain implantation separately. Capacitance--voltage curve hysteresis of Ge metal--oxide--semiconductor (MOS) capacitors may be caused by charge trapping centres in GeO7340Q, 7325http://cpb.iphy.ac.cn/CN/10.1088/1674-1056/19/5/057302https://cpb.iphy.ac.cn/CN/article/downloadArticleFile.do?attachType=PDF&id=111774Ge substrate, transistor, HfSiON, hole mobilityProject supported by the National Basic Research Program of China (Grant No.~2006CB302704).Ge and Si p-channel metal--oxide--semiconductor field-effect-transistors (p-MOSFETs) with hafnium silicon oxynitride (HfSiON) gate dielectric and tantalum nitride (TaN) metal gate are fabricated. Self-isolated ring-type transistor structures with two masks are employed. W/TaN metal stacks are used as gate electrode and shadow masks of source/drain implantation separately. Capacitance--voltage curve hysteresis of Ge metal--oxide--semiconductor (MOS) capacitors may be caused by charge trapping centres in GeO$_{x}$ ($1Ge;substrate;transistor;HfSiON;hole;mobilityGe and Si p-channel metal-oxide-semiconductor field-effect-transistors(p-MOSFETs) with hafnium silicon oxynitride(HfSiON) gate dielectric and tantalum nitride(TaN) metal gate are fabricated.Self-isolated ring-type transistor structures with two masks are employed.W/TaN metal stacks are used as gate electrode and shadow masks of source/drain implantation separately.Capacitance-voltage curve hysteresis of Ge metal-oxide-semiconductor(MOS) capacitors may be caused by charge trapping centres in GeOx(1 < x < 2).Effective hole mobilities of Ge and Si transistors are extracted by using a channel conductance method.The peak hole mobilities of Si and Ge transistors are 33.4 cm2/(V.s) and 81.0 cm2/(V.s),respectively.Ge transistor has a hole mobility 2.4 times higher than that of Si control sample.     

部分耗尽SOI NMOSFET总剂量辐照的最坏偏置

通过模拟对ON、OFF、TG三种偏置下PD SOI NMOSFET的总剂量辐照效应进行了研究.模拟发现正沟道的最坏偏置是ON偏置,背沟道的最坏偏置与总剂量有关.当总剂量大时,背沟道的最坏偏置是OFF偏置;当总剂量小时则是TG偏置.而NMOSFET的最坏偏置则取决于起主要作用的是正栅还是背栅.由于辐照产生电子空穴对的过程与电场分布强相关,通过分析不同偏置下电场分布的差异确定最坏偏置的内在机制.     

氮化硅扩散阻挡层在采用HfON栅介质的Ge MOS 电容中的作用

MOS capacitors with hafnium oxynitride（HfON）gate dielectrics were fabricated on Ge and Si substrates using the RF reactive magnetron sputtering method.A large amount of fixed charges and interface traps exist at the Ge/HfON interface.HRTEM and XPS analyses show that Ge oxides were grown and diffused into HfON after post metal annealing.A Si nitride interfacial layer was inserted between Ge and HfON as diffusion barrier.Using this method,well behaved capacitance–voltage and current–voltage characteristics were obtained.Finally hystereses are compared under different process conditions and possible causes are discussed.