6H碳化硅衬底上硅碳锗薄膜的生长特性研究

采用低压热壁化学气相沉积法,在6H-SiC衬底(0001)面上生长了不同温度(1100—1250℃),不同GeH₄流量比(6.3%—25%)的SiCGe薄膜样品,研究了SiCGe薄膜的表面形貌、生长特性以及样品中Ge组分含量的变化. 扫描电镜测试结果表明,SiCGe薄膜在低温下倾向于岛状生长模式,随着生长温度提高,岛状生长逐渐过渡到层状生长模式,同时伴有岛形状和密度的变化. X射线光电子能谱测试得出SiCGe样品中的Ge含量约为0.15％—0.62％,在其他参数不变的情况下,样品的G 关键词： 碳化硅 化学气相沉积 反相边界 岛状生长     

6H-SiC衬底上异质外延3C-SiC薄膜的结构研究

以SiH4和C3H8为反应源,在1250℃下,采用低压热壁化学气相淀积法在6H-SiC衬底上异质外延生长了3C-siC薄膜.扫描电镜和原子力显微镜测试结果显示,样品表面光滑、无明显岛状结构物质.剖面透射电镜照片显示SiC外延层致密均匀、界面平整,厚度约为50nm.高分辨透射电镜结果显示,衬底与外延层分别为排列整齐的6H-SiC结构和3C-SiC结构,两者过渡平坦、界面处无其他晶型.选区电子衍射花样标定结果再次说明外延薄膜为闪锌矿结构的3C-SiC,计算的晶格常数为0.4362nm.     

6H-SiC衬底上异质外延3C-SiC薄膜的结构研究

以SiH4和C3H8为反应源,在1250℃下,采用低压热壁化学气相淀积法在6H-SiC衬底上异质外延生长了3C-siC薄膜.扫描电镜和原子力显微镜测试结果显示,样品表面光滑、无明显岛状结构物质.剖面透射电镜照片显示SiC外延层致密均匀、界面平整,厚度约为50nm.高分辨透射电镜结果显示,衬底与外延层分别为排列整齐的6H-SiC结构和3C-SiC结构,两者过渡平坦、界面处无其他晶型.选区电子衍射花样标定结果再次说明外延薄膜为闪锌矿结构的3C-SiC,计算的晶格常数为0.4362nm.     

SiC衬底上SiCGe外延薄膜的结构

用热壁CVD法在6H-SiC衬底上生长了SiCGe三元合金,样品生长呈现出显著的岛状特征.利用SEM,TEM,EDS和PL等分析手段对薄膜进行了特性研究.发现样品包含两种特征相,由随机分布的球形岛和岛周围较平坦的背景区域组成.EDS结果表明两相组分不同:球形岛为高Ge区,组分比大于30%;背景区域Ge含量则低于1%.两种相的生长速率也不相同,在生长时间相同的情况下,背景区较薄,且满布三角形堆垛层错.样品的PL峰位于2.2和2.7eV处.分析认为,这两个峰分别来自球形岛和背景区域的带间辐射复合.     

SiC衬底上SiCGe外延薄膜的结构

用热壁CVD法在6H-SiC衬底上生长了SiCGe三元合金,样品生长呈现出显著的岛状特征.利用SEM,TEM,EDS和PL等分析手段对薄膜进行了特性研究.发现样品包含两种特征相,由随机分布的球形岛和岛周围较平坦的背景区域组成.EDS结果表明两相组分不同球形岛为高Ge区,组分比大于30%;背景区域Ge含量则低于1%.两种相的生长速率也不相同,在生长时间相同的情况下,背景区较薄,且满布三角形堆垛层错.样品的PL峰位于2.2和2.7eV处.分析认为,这两个峰分别来自球形岛和背景区域的带间辐射复合.     

Monolithically integrated enhancement/depletion-mode AlGaN/GaN HEMT D flip-flop using fluorine plasma treatment

Depletion-mode and enhancement-mode AlGaN/GaN HEMTs using fluorine plasma treatment were integrated on one wafer.Direct-coupled FET logic circuits,such as an E/D HEMT inverter,NAND gate and D flip-flop,were fabricated on an AlGaN/GaN heterostructure.The D flip-flop and NAND gate are demonstrated in a GaN system for the first time.The dual-gate AlGaN/GaN E-HEMT substitutes two single-gate E-HEMTs for simplifying the NAND gate and shrinking the area,integrating with a conventional AlGaN/GaN D-HEMT and demonstrating a NAND gate.E/D-mode D flip-flop was fabricated by integrating the inverters and the NAND gate on the AlGaN/GaN heterostructure.At a supply voltage of 2 V,the E/D inverter shows an output logic swing of 1.7 V,a logic-low noise margin of 0.49 V and a logic-high noise margin of 0.83 V.The NAND gate and D flip-flop showed correct logic function demonstrating promising potential for GaN-based digital ICs.     

Island-growth of SiCGe films on SiC

SiCGe ternary alloys have been grown on SiC by hot-wall low-pressure chemical vapour deposition. It has been found that the samples cxhibit an island configuration, and the island growth of SiCGe epilayer depends on the processing parameters such as the growth temperature. When the growth temperature is comparatively low, the epilayer has two types of islands： onc is spherical island; another is cascading triangular island. With the increase of the growth temperature, the islands change from spherical to cascading triangular mode. The size and density of the islands depend on the growth duration and GeH4 flow-rate. A longer growth time and a larger GeH4 flow-rate can increase the size and density of the island in thc initial stage of the epitaxy. In our case, The optimal growth for a high density of uniform islands occurred at a growth temperature of 1100℃ for l-minute growth, with 10 SCCM GeH4, resulting in a narrow size distribution （about 30nm diameter） and high density （about 3.5 ×10^10 dots/cm2）. The growth follows Stranski- Krastanov modc （2D to 3D modc）, both of the islands and the 2D growth layer have face-centred cubic structure, and the critical thickness of the 2D growth layer is only 2.5 nm.[第一段]     

F等离子体处理增强型及耗尽型AlGaN/GaN HEMT集成的D触发器

耗尽型和F等离子体处理增强型高电子迁移率晶体管（HEMT）被集成在同一圆片上。增强型/耗尽型 HEMT反向器、与非门以及D触发器等直接耦合场效应晶体管逻辑电路被制作在AlGaN/GaN异质结上。D触发器在GaN体系中首次被实现。在电源电压为2伏的条件下,增强型/耗尽型反向器显示输出逻辑摆幅为1.7伏,逻辑低噪声容限为0.49伏,逻辑高噪声容限为0.83伏。与非门和D触发器的功能正确,证实了GaN基数字电路的发展潜力。