High-speed low-power voltage-programmed driving scheme for AMOLED displays

A new voltage-programmed driving scheme named the mixed parallel addressing scheme is presented for AMOLED displays, in which one compensation interval can be divided into the first compensation frame and the consequent N-1 post-compensation frames without periods of initialization and threshold voltage detection. The proposed driving scheme has the advantages of both high speed and low driving power due to the mixture of the pipeline technology and the threshold voltage one-time detection technology. Corresponding to the proposed driving scheme, we also propose a new voltage-programmed compensation pixel circuit, which consists of five TFTs and two capacitors(5T2C). In-Zn-O thin-film transistors(IZO TFTs) are used to build the proposed 5T2C pixel circuit. It is shown that the non-uniformity of the proposed pixel circuit is considerably reduced compared with that of the conventional 2T1C pixel circuit. The number of frames(N) preserved in the proposed driving scheme are measured and can be up to 35 with the variation of the OLED current remaining in an acceptable range. Moreover, the proposed voltage-programmed driving scheme can be more valuable for an AMOLED display with high resolution, and may also be applied to other compensation pixel circuits.     

二次耦合直流输出的金属氧化物TFT行驱动电路

为了弥补现有氧化物TFT的行驱动电路输出模块在功率消耗、响应速度、输出摆幅等方面的不足,提出了基于二次耦合的直流输出模块,并由此研究设计新的行驱动电路拓扑。仿真结果表明,该输出模块具有驱动能力强、响应速度快等优点。最后,基于刻蚀阻挡层(ESL)结构的氧化物TFT工艺,在玻璃衬底上成功制备了该行驱动电路,实测单级功耗为325μW。     

基于金属氧化物薄膜晶体管的高速行集成驱动电路

本文提出了一种基于非晶铟锌氧化物薄膜晶体管的高速行集成驱动电路,该电路采用输入级复用的驱动结构,一级输入级驱动三级输出级,不仅减少电路输入级2/3晶体管的数量,实现AMOLED或AMLCD显示屏的窄边框显示,而且输入级的工作频率是输出级的1/3,该结构适用于高速驱动电路.电路内部产生了三次电容耦合效应,每一次电容耦合效应都可以提高相应节点的电压,保证了信号完整传输.输出级采用了一个二极管接法的薄膜晶体管,该薄膜晶体管连接了输出级的控制信号和上拉薄膜晶体管的栅极,利用的每一级输出级输出时所产生的电容耦合效应,增加上拉薄膜晶体管的栅极电压,有效地提高电路输出能力和工作速度.仿真表明电路能够输出脉宽达到4μs速度.最后成功地制作了10级行集成驱动电路,包括10级输入级电路和30级输出级电路,负载为R=10k?和C=100pF,实验结果验证,该电路满足4k×8k显示屏在120 Hz刷新频率下的驱动需求.     

一种输入级模块复用的In-Zn-O薄膜晶体管行集成驱动电路

提出了一种新型的基于In-Zn-O薄膜晶体管(IZO TFT)的行集成驱动电路。该电路采用了输入级模块复用的驱动方法,即一级输入级驱动多级输出级,因此可以显著地减少输入级模块TFT的数量,缩减电路的面积,满足高分辨率显示屏设计,同时也可以迎合显示屏窄边框的审美需求。电路的输入级模块工作时间是输出级模块的n倍(n是一级输入级模块驱动输出级模块的级数),因此输入级尺寸可以做得更小。另外,该电路的驱动时钟频率是传统结构中一级输入级模块驱动一级输出级模块时钟频率的1/n,有效地降低了电路的动态耦合功耗。我们制作了20级的行集成驱动电路,一级输入级模块驱动两级输出级模块,该电路的尺寸为宽730μm,高为164μm,满足窄边框的要求。从实验测结果表明,该电路很好地满足300PPI的AMLCD或AMOLED显示屏的需求。