纳米晶复合Nd2Fe14B/α-Fe合金制备与磁性能的研究

采用熔体快淬及晶化处理工艺制备Nd11Fe71Co8V1.5Cr1B7.5纳米晶合金。经21m·s-1快淬及640℃ 4min晶化处理后,制成的粘结磁体的磁性能最佳,为:Br=0.64T,JHc=903.5kA·m-1,(BH)max=71kJ·m-3。添加Cr元素可提高内禀矫顽力,从而提高最大磁能积。     

0.35μm CMOS 2.5Gb/s宽动态范围前置放大器设计

采用Chartered 0.35μm CMOS工艺设计了一种适用于光纤传输系统STM-16(2.5Gb/s)速率级的低功耗、宽动态范围的前置放大器.该前置放大器采用RGC(Regulated Cascode)结构作为输入级,同时引入消直流电路来提高光电流的过载能力.仿真结果表明,前置放大器的跨阻增益为57.0dBΩ,-3dB带宽为2.003GHz;当误码率BER为10~(-12)时,输入灵敏度为-23.0dBm,过载光电流达到800 μ A.3.3V单电源供电时,功耗仅为59.43mW.芯片面积为465 μm × 435 μm.     

温度改变对钛氧化物忆阻器导电特性的影响

相同测试条件下,纳米钛氧化物忆阻器的导电过程存在不稳定性,制约了对器件瞬态阻抗的精确读取与控制,并影响了器件应用于电路设计的可靠性与稳定性.杂质漂移与隧道势垒的共存是导致上述不稳定性的可能因素,且杂质漂移特性与环境温度密切相关.然而,目前尚无通过控制温度提高忆阻器导电稳定性的具体研究.基于杂质漂移与隧道势垒共存,本文分析了温度与忆阻器导电特性的关联,研究了器件活跃区域厚度及初始掺杂层厚度的改变对临界温度的影响,利用SPICE软件进行了仿真验证并给出结果,得出提高忆阻器导电稳定性的方法有:增大活跃区域厚度、降低初始杂质浓度及保持环境温度稳定且低于临界温度,从而为制备性能稳定的忆阻器及推动器件在实际电路中的应用提供依据.     

高速数据采集中的PCI Express总线性能分析

随着高速采集系统的采样速率的增大和采样精度的提高,如何设置PCI Express系统的参数,充分利用PCI Express总线的带宽,以满足高速海量数据的实时传输就变得非常重要。在此分析了PCI Express系统数据传输开销的来源,研究了几种主要的系统参数,以提高数据吞吐量。通过使用PLDA的EZDMA2 IP核,在Xilinx KC705评估板上对各个参数进行测试,结果表明,灵活设置这些关键的系统参数可以利用较少的FPGA资源,同时达到较高的传输带宽,对PCI Express系统设计具有非常高的参考价值。     

动态对抗下捷变频对雷达检测性能的影响及其抗干扰性能度量研究

分析研究了动态对抗情况下捷变频对雷达检测性能的影响,提出了一种雷达捷变频抗干扰性能的度量方法.     

High throughput N-modular redundancy for error correction design of memristive stateful logic

Memristive stateful logic is one of the most promising candidates to implement an in-memory computing system that computes within the storage unit. It can eliminate the costs for the data movement in the traditional von Neumann system. However, the instability in the memristors is inevitable due to the limitation of the current fabrication technology, which incurs a great challenge for the reliability of the memristive stateful logic. In this paper, the implication of device instability on the reliability of the logic event is simulated. The mathematical relationship between logic reliability and redundancy has been deduced. By combining the mathematical relationship with the vector-matrix multiplication in a memristive crossbar array, the logic error correction scheme with high throughput has been proposed. Moreover, a universal design paradigm has been put forward for complex logic. And the circuit schematic and the flow of the scheme have been raised. Finally, a 1-bit full adder (FA) based on the NOR logic and NOT logic is simulated and the mathematical evaluation is performed. It demonstrates the scheme can improve the reliability of the logic significantly. And compared with other four error corrections, the scheme which can be suitable for all kinds of R-R logics and V-R logics has the best universality and throughput. Compared with the other two approaches which also need additional complementary metal-oxide semiconductor (CMOS) circuits, it needs fewer transistors and cycles for the error correction.     

A 3.125-Gb/s inductroless transimpedance amplifier for optical communication in 0.35μm CMOS Xu Hui(徐晖), Feng Jun(冯军), Liu Quan(刘全), Li Wei(李伟)

采用0.35μm CMOS工艺设计了一种适用于光通信的低功耗前置放大器,芯片最高工作速率可达3.125Gb/s。该前置放大器采用RGC (Regulated Cascode)结构作为输入级,同时引入消直流电路来稳定电路的直流工作点。在片测试结果表明,前置放大器的跨阻增益为54.2dBΩ,-3dB带宽为2.31GHz,平均等效输入噪声电流谱密度为18.8pA/?Hz;输入为2.5Gb/s和3.125Gb/s信号时均可获得清晰眼图;3.3V单电源供电时,功耗仅为58.08mW,其中20mW来自输出缓冲。芯片面积为465μm435μm。     

强度不变的自动模式识别技术

针对光学模式识别技术用化要求，提出一种新的图像预处理算法，使识别现场光照明强度及分布的变化对识别效率所带来的影响大大降低。采用该算法进行实时硬件光学相关试验结果证实应用该算法可以实现强度的自动目标识别。     

使用Winsock控件实现对网络的访问

在开发经验的基础上 ,介绍了在进行网络通信时如何选用 TCP/IP协议 ,并结合实践经验重点描述了用 Winsock控件访问网络的 Client/Server程序设计步骤