排序方式: 共有7条查询结果,搜索用时 505 毫秒
1
2.
3.
电平转换器可以作为1.1V核心电压和3.3V输入输出电压之间的高速接口.优化的电压上升转换器使用2.5V厚氧化层栅零阈值电压nMOS管保护1.1V薄氧化层栅nMOS器件,在输入电压低至0.7V时仍可正常工作;此外,在六种不同工作情况下电路性能良好.3.3 V nMOS器件作为优化电平下降转换器的上拉和下拉器件,它们的供电电压是1.1V,栅压范围从0V到3.3V.电平下降转换器没有最小核心电压限制,上升传输延时0.111 ns,下降传输延时0.121 ns.电平转换器经过结构优化后,可以成功应用到40 nm CMOS工艺的I/O库的输入输出单元中,作为低功耗、高速接口. 相似文献
4.
The frame structure of a process design kit(PDK) is described in detail,and a practical design method for PDK is presented.Based on this method,a useful SMIC 65 nm PDK has been successfully designed and realized, which is applicable to native EDA software of Zeni.The design process and difficulties of PDK are introduced by developing and analyzing these parameterized cell(Pcell) devices(MOS,resistor,etc.).A structured design method was proposed to implement Pcell,which makes thousands upon thousands of s... 相似文献
5.
6.
7.
1