Degradation mechanisms for a-InGaZnO thin-film transistors functioning under simultaneous DC gate and drain biases

Degradation of a-InGaZnO thin-film transistors working under simultaneous DC gate and drain bias stress is investigated, and the corresponding degradation mechanism is proposed and verified. The maximum degradation occurs under the bias stress condition that makes the electric field and electron concentration relatively high at the same time. Trapping of hot electrons in the etching-stop layer under the extended drain electrode is proven to be the underlying mechanism. The observed degradation phenomena, including distortion in the transfer curve on a logarithmic scale and two-slope dependence on gate bias on a linear scale, current crowding in the output curve, and smaller degradation in transfer curves measured under large drain bias, can all be well explained with the proposed degradation mechanism.     

工科专业的量子力学教学方法探索

主要从量子力学发展史,量子力学概念,多媒体技术运用,以及针对工科专业的实际应用4个方面,对工科专业的量子力学教学方法进行了探索,激发学生学习量子力学的兴趣,提高教学质量.     

Positive gate bias stress-induced hump-effect in elevated-metal metal-oxide thin film transistors

Under the action of a positive gate bias stress, a hump in the subthreshold region of the transfer characteristic is observed for the amorphous indium–gallium–zinc oxide thin film transistor, which adopts an elevated-metal metal–oxide structure. As stress time goes by, both the on-state current and the hump shift towards the negative gate-voltage direction.The humps occur at almost the same current levels for devices with different channel widths, which is attributed to the parasitic transistors located at the channel width edges. Therefore, we propose that the positive charges trapped at the backchannel interface cause the negative shift, and the origin of the hump is considered as being due to more positive charges trapped at the edges along the channel width direction. On the other hand, the hump-effect becomes more significant in a short channel device(L = 2 μm). It is proposed that the diffusion of oxygen vacancies takes place from the high concentration source/drain region to the intrinsic channel region.     

Crystallization of amorphous silicon beyond the crystallized polycrystalline silicon region induced by metal nickel

Crystallization of amorphous silicon(a-Si) which starts from the middle of the a-Si region separating two adjacent metal-induced crystallization(MIC) polycrystalline silicon(poly-Si) regions is observed. The crystallization is found to be related to the distance between the neighboring nickel-introducing MIC windows. Trace nickel that diffuses from the MIC window into the a-Si matrix during the MIC heat-treatment is experimentally discovered, which is responsible for the crystallization of the a-Si beyond the MIC front. A minimum diffusion coefficient of 1.84×10~(-9)cm~2/s at 550℃ is estimated for the trace nickel diffusion in a-Si.     

Degradation mechanisms for polycrystalline silicon thin-film transistors with a grain boundary in the channel under negative gate bias stress

The negative gate bias stress (NBS) reliability of n-type polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with a distinct defective grain boundary (GB) in the channel is investigated. Results show that conventional NBS degradation with negative shift of the transfer curves is absent. The on-state current is decreased, but the subthreshold characteristics are not affected. The gate bias dependence of the drain leakage current at V_ds of 5.0 V is suppressed, whereas the drain leakage current at V_ds of 0.1 V exhibits obvious gate bias dependence. As confirmed via TCAD simulation, the corresponding mechanisms are proposed to be trap state generation in the GB region, positive-charge local formation in the gate oxide near the source and drain, and trap state introduction in the gate oxide.     

Degradation and its fast recovery in a-IGZO thin-film transistors under negative gate bias stress

A new type of degradation phenomena featured with increased subthreshold swing and threshold voltage after negative gate bias stress (NBS) is observed for amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs), which can recover in a short time. After comparing with the degradation phenomena under negative bias illumination stress (NBIS), positive bias stress (PBS), and positive bias illumination stress (PBIS), degradation mechanisms under NBS is proposed to be the generation of singly charged oxygen vacancies ($V_{\mathrm{o}}^{+}$) in addition to the commonly reported doubly charged oxygen vacancies ($V_{\mathrm{o}}^{2+}$). Furthermore, the NBS degradation phenomena can only be observed when the transfer curves after NBS are measured from the negative gate bias to the positive gate bias direction due to the fast recovery of $V_{\mathrm{o}}^{+}$ under positive gate bias. The proposed degradation mechanisms are verified by TCAD simulation.