Mapping 3-D IIR digital filter onto systolic arrays

We present here an efficient systolic implementation for 3-D IIR digital filters. The systolic implementation is obtained by using an algebraic mapping technique. This new mapping technique gives us the choice to mix pipelined variables and broadcast variables. We also determine, through the mapping method, the buffer sizes, the direction of variables propagations and the data feeding and extracting points. The resultant systolic array implementation is a modular structure composed of 2-D filter modules connected by simple buffers. This new systolic implementation is regular, modular and amenable to VLSI Implementation.     

Optimal allocation of reliability tasks to mitigate faults during system development

^** Email: walter.johnston{at}baesystems.com^*** Email: j.quigley{at}strath.ac.uk^**** Email: lesley.walls{at}strath.ac.uk This paper considers reliability planning for a concept designfor a new system where a portfolio of possible reliability developmenttasks exists; the goal is to find a selection and sequence oftasks to achieve reliability targets subject to time constraintsat minimal cost. This is non-trivial given that each task potentiallycan expose several different weaknesses and each weakness potentiallycan be exposed by several different tasks. We use a Bayesianpoint process model to estimate the system reliability. Theprior distribution maps to a fault register and relates directlyto a set of potential engineering modifications.The likely impactof each task can be assessed using the point process model.An integer programming approach is used to sequence and scheduletasks under the constraint that contractual reliability requirementsmust be met. An illustrative example is provided and an extensionto system availability is proposed.     

Requirements in mathematics textbooks: a five-dimensional analysis of textbook exercises and examples

Mathematics textbooks play a very important role in mathematics education and textbook tasks are used by students for practice to a large extent. Since the nature of the tasks may influence the way students think it is important that the textbooks provide a balance of a variety of tasks. The analyses of the requirements in textbook tasks contain the usual dimensions of content, cognitive demands, question type and contextual features. The aim of this study is to embed a new fifth dimension into the framework: mathematical activities. This addresses the question of what a student should do in a particular textbook task: to represent, to compute, to interpret or to use argumentation. The analysis encompassed more than 22,000 tasks from the most commonly used Croatian mathematics textbooks in the 6th, 7th and 8th grade. The results show that the textbooks do not provide a full range of task types. There is an emphasis on computation, while argumentation and interpretation activities, reflective thinking and open answer tasks are underrepresented. The study revealed that incorporating mathematical activities into the multidimensional framework of textbook tasks may help to better understand the opportunities to learn which are afforded students by using mathematics textbooks.     

基于代理的网格中间件设计与策略研究

为了使网格技术能更好的支撑上层应用,增强网格中间件的灵活性和调度效率。提出了一种基于代理的网格中间件体系结构,该中间件在设计上充分利用代理的可移动性和可控管理提高网格底层资源的利用率。最后在电信客户价值分析业务的实现框架基础上,给出网格中间件中任务分解、任务执行和服务聚合等策略,本研究结果可以提供高效、安全和可控的上层应用开发。     

基于多任务嵌入式应用的MP3实时解码系统设计

给出一种基于多任务嵌入式应用的MP3实时解码系统设计方法及实现过程.该系统针对以ARM926EJ-S处理器为核心的SoC硬件平台,通过对MP3解码过程中的关键耗时模块进行算法优化,提高解码效率,达到实时播放的要求.实验结果证明,该系统可在处理器主频仅为36 MH2的条件下流畅播放MP3音乐(码率为192 kb/s).该设计特点为根据子带合成滤波中乘法运算的数据特征,巧妙地对操作数进行预移位操作,从而在保证一定数据精度的基础上缩短乘法运算的指令周期,实现解码效率的大幅度提升.提出一种利于高效任务调度的实时播放方案,对于高实时性、低功耗多任务嵌入式系统设计具有很好的参考意义.     

RTEMS上基于软件重算的容错支撑设计研究

基于软件重算的容错技术,提出以组的形式管理主备份任务或各版本任务可以使程序员更加方便地编写有容错功能的程序.在RTEMS上,基于核心层的handler和系统服务层的任务管理器提供的服务,设计了任务组数据结构及对其操作的API,为应用程序员在RTEMS上编程时实现几种经典的软件容错方法提供了接口.     

基于移动代理和信任机制的网格作业管理

介绍了网络计算环境下的作业管理,引入了移动代理技术和信任机制,并进行了深入分析,对所用到的关键技术进行了详细的解释,说明了基于移动代理和信任机制的网格作业管理运行步骤.     

基于版本的教学任务管理系统的设计

针对教学任务管理的现状,提出了基于版本的教学任务管理的设计方案.根据数据的生存周期,优化教学任务管理流程,给出了数据库设计方案,提出C/S和B/S组合实现方法.最后给出应用案例.     

Cognitive Radio Design on an MPSoC Reconfigurable Platform

Cognitive Radio has been proposed as a promising technology for solving today’s spectrum scarcity problem by means of dynamic spectrum access. The multiprocessor system-on-chip (MPSoC) reconfigurable platform is proposed as an enabling technology for cognitive radio. In this paper, we propose a design methodology based on task transaction level interface for the design of cognitive radio baseband on an MPSoC reconfigurable platform. The reconfiguration of a novel, low-complexity fast Fourier transform for orthogonal frequency-division multiplexing based Cognitive Radio is used as a design case to show the effectiveness of the methodology for modelling the dynamic behavior of Cognitive Radio and facilitating the platform implementation.