An Efficient Dictionary Organization for Maximum Diagnosis

The major problem of fault diagnosis with a fault dictionary is the enormous amount of data. The technique used to manage this data can have a significant effect on the outcome of the fault diagnosis procedure. If information is removed from a fault dictionary in order to reduce the size of the dictionary, its ability to diagnose stuck-at faults and unmodeled faults may be severely debased. Therefore, we focus on methods for producing a dictionary that is both small and lossless-compacted. We propose an efficient dictionary for maximum diagnosis, which is called SD-Dictionary. This dictionary consists of a static sub-dictionary and a dynamic sub-dictionary in order to make a smaller dictionary while maintaining the critical information needed for the diagnostic ability. Experimental results on ISCAS’ 85, ISCAS’ 89 and ITC’ 99 benchmark circuits show that the size of the proposed dictionary is substantially reduced, while the dictionary retains most or all of the diagnostic capability of the full dictionary. This work was supported by the “System IC 2010” project of Korea Ministry of Science and Technology and Ministry of Commerce, Industry and Energy. Editor: Y. Takamatsu Sunghoon Chun received the B.S. degrees in Electrical and Electronic Engineering from Yonsei University, Seoul, Korea, in 2002. He was a Reseach Engineer with ASIC Research Center in Yonsei University. He researched for test methodologies for SoC. He received the M.S. degrees in Electrical and Electronic Engineering from Yonsei University in 2005. He is currently working toward Ph.D. degree in Electrical and Electronic Engineering at Yonsei University. His area of interests includes SoC testing, delay testing, fault diagnosis, functional testing for processor based system and test methodologies for signal integrity faults. Sangwook Kim received the B.S., and M.S. degrees in Electrical and Electronic Engineering from Yonsei University, Seoul, Korea, in 1999, and 2001, respectively. He researched for Digital Signal Processor design and fault diagnosis of VLSI. He is a Research Engineer with SoC Design Group of System IC Division in LG Electronics, Inc. He is currently interested in SoC design for HDTV and design verification. Hong-Sik Kim was born in Seoul, Korea, on April 4, 1973. He received the B.S., M.S. and Ph.D. degrees in Electrical and Electronic Engineering from Yonsei University, Seoul, Korea, in 1977, 1999, and 2004, respectively. He was a Post-Doctorial Fellow with the Institute of Virginia Technology. He is currently working on System LSI Group in the Samsung Electronics. His current research interest includes design-for-testability, built-in self tests and fault diagnosis. Sungho Kang received the B.S. degree from Seoul National University, Seoul, Korea, and the M.S. and Ph.D. degrees in electrical and computer engineering from The University of Texas at Austin. He was a Post-Doctorial Fellow with the University of Texas at Austin, a Research Scientist with the Schlumberger Laboratory for Computer Science, Schlumberger Inc., and a Senior Staff Engineer with the Semiconductor Systems Design Technology, Motorola Inc. Since 1994, he has been an Associate Professor with the Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea. His current research interests include VLSI design, VLSI CAD and VLSI testing and design for testability.     

基于贝叶斯网的网络故障监测方法

提出了一种基于贝叶斯网络的智能故障监测方法．通过有限混合模型对单个MIB变量的行为进行建模，将基于模型参数产生的残差用以描述MIB变量的状态；把观测得到的各MIB变量的信息经由贝叶斯网络加以融合，从而计算出网络出现故障的概率，包括未知的和不可预见的故障．实验中，在故障发生前约5mm网络异常的后验概率超过0．5，表明该方法能够在故障发生以前发现网络异常行为．     

A Novel Built-In Self-Repair Approach for Embedded RAMs

In this paper, a novel built-in self-repair approach, block-level reconfiguration architecture, is proposed. Our approach is based on the concept of divided word line (DWL) for high-capacity memories, including SRAMs and DRAMs. This concept is widely used in low-power memory designs. However, the characteristics of divided word line memories have not been used for fault-tolerant applications. Therefore, we propose the block_repair fault-tolerant architecture based on the structure of DWL for high-capacity memories. The redundant rows of a memory array are divided into blocks and reconfiguration is performed at the block level instead of the traditional row level. Our fault-tolerant architecture can improve the yield for memory fabrication significantly. Moreover, the characteristics of low power and fast access time of DWL memories are also preserved. The reconfiguration mechanism of our block_repair architecture requires negligible hardware overhead. According to experimental results, the hardware overheads are less than 0.73% and 0.48% for 256-Kbit SRAMs and 8-Mbit DRAMs, respectively. The repair rate of our approach with previous memory repair algorithms is compared. It is found that block_repair approach improves repair rate significantly. The yield improvement over traditional row-based approaches is also analyzed. Simulated results show that the present approach can significantly improve fabrication yield.     

Modeling the Random Parameters Effects in a Non-Split Model of Gate Oxide Short

This paper presents a new model for gate-to-channel GOS defects. The transistors used in digital cell library are usually designed with a minimum-size. This new model permits to handle minimal-length transistors allowing the simulation of GOS defects in realistic digital circuits. Based on the electrical analysis of the defect behavior, a comprehensive method for the model construction is detailed. It is shown that the behavior of the proposed model matches in a satisfactory way the behavior of a defective transistor including the random parameters of the defect.     

基于T-S模糊模型的非线性不确定系统奇偶方程鲁棒故障诊断

针对T-S模糊模型描述的具有外部干扰的非线性不确定系统,构造了相应的测量冗余方程和奇偶方程,给出并证明了对特定传感器和执行器故障敏感的最优奇偶向量的存在条件和求解定理.采用奇偶方程故障检测与诊断方法,研究了非线性不确定系统的鲁棒故障检测和诊断.最后,通过仿真示例说明了本文所提出的方法是有效的.     

Fault management: analysis of fault location algorithm in optical network

cessible when solving the multifailure location problem. For multifailures, the proposed mechanism using time-stamps is more efficient in locating the fault and decreasing computational complexity.     

模拟电路k故障诊断理论的数学模型

故障诊断理论是模拟电路故障诊断理论的一个重要分支。现已提出的k故障诊断方法有支路法、节点法、割集法、回路法以及网孔法,这些方法都能较好地完成故障定位与故障定值,并在可测性设计方面有了较大的发展,但是这些方法还没有一个统一的理论模型。本文对这几种方法进行了总结和概括,提出了k故障诊断理论的统一数学模型,这项研究工作的目的是为了加强k故障诊断理论的系统性和严密性,并为更深入的研究和实践提供了理论依据。     

具有容错功能的OLED有源驱动电路

以有机电致发光器件(OLED)为基础的显示或照明器件,通常会受到短路故障的影响,从而使得像素失效,降低面板的亮度,进而严重地影响亮度的均匀性,并且会产生大量的功耗.本文介绍了一种新的有源OLED驱动电路,以自动检测在OLED中发生的短路故障并切换至备用OLED.该电路采用p型低温多晶硅薄膜晶体管制造.当发生短路故障时,本电路可以在不改变驱动电流的情况下,保持OLED像素的亮度维持不变.实验结果表明,本电路不仅具有容错功能,而且与标准电路相比可以显著地降低功耗.