SDH设备从时钟的定时特性

本文讨论ＳＤＨ设备或网元的从时钟的定时要求，可作为网元时钟的技术指标，亦可作制订网元从时钟技术标准的依据。     

基于SoC平台的AHB总线系统研究

针对SoC设计中的IP核复用问题提出了一种基于平台的解决办法。传统方法是将特定功能模块的非标准接口标准化为AHB主/从设备接口,但是这种方法设计效率较低,不便将模块有效地嵌入SoC平台。新的方法是基于ARMSoC通用平台设计寄存器总线标准接口,这种设计使整个系统的结构清晰,设计好的寄存器总线接口可增强系统的通用性,增强了系统中功能模块的可移植性。     

主从型D触发器的无效功耗分析

对主从型 D触发器的功能及时序进行分析 ,证明了该类型触发器无效功耗的存在 ;文章建立了无效功耗的数学模型 ,并通过对典型应用电路的理论推导和计算机模拟 ,验证了这一结论的正确性。分析无效功耗的目的是为了采取措施消除其影响 ,文中提出的数学模型对低功耗 VL SI设计有着重要的价值。     

Performance of Bluetooth Slave/Slave Bridge

The performance of a Bluetooth scatternet with a Slave/Slave bridge is analyzed using the tools of queueing theory. We analyze two possible scheduling policies: limited service and exhaustive service, and derive analytical results for the probability distribution of access delay (i.e., the time that a packet has to wait before being serviced) and end-to-end delay for both intra- and inter-piconet bursty traffic. The exhaustive service discipline was found to provide lower values for all delay variables, over a wide range of parameter values. All analytical results have been confirmed through simulations.     

PHASE AND FREQUENCY LOCKING OF MICROWAVE AND MILLIMETER WAVE POWER COMBINING

The phase and frequency locking of microwave, millimeter wave power combining were analysed and summarized in an all-round way. The master/slave phase locking of cavity oscillators, the peer phase locking of mutually coupled oscillators, and the peer phase locking of ring-connected multiple oscillators were investigated. The results of numerical calculations, and the relations of phase to phase locking model and oscillator parameters were given. And the cavity and space power combining aspects for microwave and millimeter wave were presented.     

一种简易的总线传输协议

在片上系统(System on Chip,SoC)通信中,主机与从机进行通信时,为了实现主机与从机之间的高速寄存器读写操作,提出了一种由主机发起、从机响应、低位宽和高速率的总线传输协议。该总线由片选使能线、时钟传输线和双向数据传输线组成,分析了传输时主机写从机、主机读从机的总线行为,以及主机解析从机写操作和从机解析主机读操作的过程。采用VHDL语言实现了总线的硬件设计,并对总线的读写行为做了功能和性能测试,该总线接口可以满足实际应用需求。