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排序方式: 共有232条查询结果,搜索用时 687 毫秒
51.
Quan Sha Dongwei Cao Jiaxin Wang Hanbin Hu Jiaxin Li Wei Chen Lei He Graham N. Newton Prof. Dr. Yu-Fei Song 《Chemistry (Weinheim an der Bergstrasse, Germany)》2022,28(57):e202201899
The host–guest interaction can remarkably alter the physiochemical properties of composite materials. It is crucial to clarify the mechanism by revealing the influence of the host on the electronic structure of the guest molecules. Herein, we study the structural variation of polyoxometalates (POMs) after being confined in single-walled carbon nanotubes (SWNT). What we found is that in addition to the reported charge transfer from SWNT to POM, an intramolecular electron transfer within a single POM cluster can be observed in the POM@SWNT composites. Moreover, the charge density on the bridged oxygen of POMs is prominently enhanced. The structural change and electron reconfiguration of POMs upon encapsulation in SWNT significantly speed up electron and ion transport, leading to the improved electrochemical performance for sodium ions storage. 相似文献
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The dynamic reconfiguration technique based on field-programmable gate array (FPGA) can improve the resource utilization.Discussed are the dynamic reconfiguration principles and methods.Proposed is a remote dynamic reconfiguration scheme using Xilinx Virtex-II FPGA and SMCS Ethernet Physical layer transceiver(PHY).The hardware of the system is designed with Xilinx Virtex-II XC2V30P FPGA that embedds MicroBlaze and MAC IP core,and its network communication software based on transmission control protocol/Internet protocol (TCP/IP) protocol is programmed by loading LwlP to MicroBlaze. The experimental results indicate that the remote FPGA dynamic reconfiguration system(RFDRS) can switch freely in the eight lighting modes of light emitting diodes (LED),and that,using dynamic reconfiguration technology,FPGA resource utilization can be reduced remarkably,which is advantageous in the system upgrade and software update. 相似文献
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为了提高现场可编程门阵列(FPGA)的资源利用率,在介绍FPGA重构技术的原理和分类的基础上,讨论了Virtex-4系列FPGA的配置原理和动态重构的方法,并设计出数字信号处理器(DSP)配置FPGA的硬件方案来实现可重构系统。FPGA采用SelectMAP配置方式,实现配置逻辑的快速重构和局部动态重构,最后根据Virtex-4的配置流程和时序关系,给出了可重构系统配置的软件流程。经实验测试,该系统稳定可靠,可在1 s内完成5 Mbyte配置程序的动态重构。 相似文献
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针对8磁极电磁轴承容错控制问题,文中提出了一种基于磁通等效的电磁轴承容错控制方法。该方法首先通过仿真得到磁通的电流-磁通影响系数,利用线性代数理论计算得到电流分配矩阵。当某一个磁极回路发生故障时,利用电流分配矩阵计算重构电流,使8个磁极端面的磁通在故障前后保持不变,即磁通等效,从而实现容错运行。在ANSYS有限元仿真平台进行仿真,用磁通等效方法可以较好地还原故障前的端面磁通和磁力线分布,并计算得到了磁通误差(最大不超过3.2%,绝大部分小于0.5%)和力误差(最大不超过7%,绝大部分小于1.5%),证明了所提出磁通等效容错控制方法的有效性。 相似文献
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Lattice metamaterials constructed by curved microstructures exhibit large stretchability and are promising in soft electronics and soft robotics. Fractal structures are particularly efficient in improving stretchability as it shows multiple-order uncurling. However, the development of fractal metamaterials is hindered by hierarchical structures and large deformations. In this study, a design framework combining experiments, hierarchical theoretical models, and finite element simulations is developed to program the mechanical behaviors of fractal metamaterials. For 3D printing, a digital design tool is developed to visualize the structure and automatically generate the manufacturing representations. Results show that large stretchability (≈360%), bionic stress–strain curve matching, and imperfection insensitivity can be programmed by tuning the geometric parameters. An integrated device of an electromyogram sensor embedded in an imperfection-insensitive fractal metamaterial that matches the J-shaped stress–strain curve of human skin is demonstrated. Light-emitting diode devices based on fractal metamaterial with shape reconfiguration are also presented. This st paves a new way to realize multifunctional soft devices using fractal metamaterials. 相似文献
56.
端到端重配置技术起源于软件无线电,软件无线电技术实现了终端的多模式支持功能,并实现了软件从空中接口的下载.端到端重配置技术利用软件无线电提供的重配置能力,构建起以可重配置的终端、基站等网元为主体的体系结构,结合先进的动态网络规划、灵活频谱管理和联合无线资源管理技术,实现对重配置能力和异构无线资源的有效利用,保证用户的无缝业务体验.本文论述了端到端重配置技术的产生背景、基本概念和研究现状,对重配置研究中的主要问题和关键技术(包括架构、规划和管理等方面的内容)进行了系统的总结,最后就重配置未来研究的重点提出了自己的看法. 相似文献
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The concept of using a microcontroller coupled to re-programmable FPGAs is being used at the heart of Run-Time Reconfigurable (RTR) systems. This paper presents the development of an RTR system for DSP and telecommunication applications. It differs from other systems, in that it treats reconfiguration time as a key design parameter by employing design for reconfiguration where partial reconfiguration is identified in the design of the circuit architecture. Reductions of up to 75% in the implementation time of multiplication, division and square root circuits have been achieved using the Xilinx XC6200 FPGA family. A special hardware/software interface called the Virtual Hardware Handler, has also been developed to support the design approach. It vastly simplifies the reconfiguration operation, reducing it to a simple process of passing pointers and data. The approach has been implemented on a windows-based RTR system. 相似文献