RPE—LTP—LPC语音编译码的DSP实现

本文提出了用数字信号处理器(DSP)实时实现“规则脉冲激励—长时预测—线性预测(RPE-LTP-LPC)”语音编译码(声码器)的方法。     

Domain Specific Tools and Methods for Application in Security Processor Design

Security processors are used to implement cryptographic algorithmswith high throughput and/or low energy consumption constraints. The designof these processors is a balancing act between flexibility and energy consumption.The target is to create a processor with just enough programmability to covera set of algorithms—an application domain. This paper proposes GEZEL,a design environment consisting of a design language and an implementationmethodology that can be used for such domain specific processors. We use thesecurity domain as driver, and discuss the impact of the domain on the targetarchitecture. We also present a methodology to create, refine and verify asecurity processor.     

Performance Analysis of Fair Channel Sharing Policies in an Integrated Cellular Voice/Data Network

We study channel sharing in an integrated cellular voice/data network with a finite queue for data call requests that cannot be served immediately upon arrival. Using analytical techniques, a comparison of different fair channel sharing policies is made. As a main result, a closed-form expression is derived for the expected sojourn time (waiting time plus transfer time) of a data call, conditional on its size, indicating that the sojourn time is proportional to the call size. This attractive proportionality result establishes an additional fairness property for the channel sharing policies proposed in the paper. Additionally, as a valuable intermediate result, the conditional expected sojourn time of an admitted data call is obtained, given the system state at arrival, which may serve as an appreciated feedback information service to the data source. An extensive numerical study is included to compare the proposed policies and to obtain insight in the performance effects of the various system and policy parameters.     

多通道温度控制器的研制

介绍一种多通道温度控制器的主要技术性能，描述了该控制器以８０９８单片机为核心的硬件系统和软件结构，并就程序设定功能和应用效果全了全面分析，实际控制结果表明：该控制器具有较高的温度控制品质。     

单通道双向式Chirp付立叶变换处理器研究

提出了一种单通道双向式Ｃｈｉｒｐ付立叶变换处理器方案，作了理论分析，最后给出了部分实验结果     

三代半航空电子系统核心处理技术研究

集中控制和综合处理技术已广泛应用于现代军用航空电子系统,综合处理机作为航空电子系统控制和管理的计算机信息处理平台,其开放式系统结构、综合处理技术及可靠性将是系统设计的关键。介绍了一种高性能机载核心处理计算机系统。根据航空电子系统功能需求,进行了综合化、层次化结构设计,并对该系统的重构管理、综合显示管理和告警管理等关键技术进行了研究分析,同时给出了合理的解决方案。航空电子系统综合试验表明,核心处理机性能先进,可靠性高,并极大地改善和提高了航空电子系统的整体性能。     

A Distributed,Simultaneously Multi-Threaded (SMT) Processor with Clustered Scheduling Windows for Scalable DSP Performance

A scalable, distributed, processor architecture is presented that emphasizes on high performance computing for digital signal processing applications by combining high frequency design techniques with a very high degree of parallel processing on a chip. The architecture is based on a superscalar processor model with a modified Tomasulo scheme that was extended to eliminate all central control structures for the data flow and to support simultaneous instruction issue from multiple independent threads [simultaneously multi-threaded (SMT)]. Consequent application of fine clustering reduces the cycle-time for wire-sensitive building blocks of the processor like the register file and the scheduling window and leads to a distributed architecture model, where independent thread processing units, arithmetic logic units, registers files and memories are distributed across the chip and communicate with each other by special network. A special communication protocol replaces broadcasting and associative compare of destination tags in a centralised instruction scheduler with explicit operand transfer instructions, thus decentralizing the control of the data flow to the greatest extent. As a result, the processor cycle time does neither depend on the issue bandwidth of a single thread nor on the execution bandwidth of the SMT processor. This makes the performance of the architecture scalable with both the number of function and the number of thread units without having any impact on the processors cycle-time. Performance and scalability of the proposed microarchitecture is demonstrated with critical signal processing kernels from the MPEG-4 video coding standard on a cycle-true simulator.

基于MicroBlaze软处理器的无线定位算法验证平台的设计与实现

随着移动通信技术的发展,基于移动通信系统的无线定位算法越来越吸引人们的关注。为了对该类算法进行实际验证,设计和实现硬件验证平台。该平台以Xilinx的Spartan XC3S1600E FPGA为核心,采用先进的MicroBlaze软处理器作为控制CPU,并与用Verilog语言描述的控制逻辑进行集成,充分展现了FPGA的强大功能。经过Matlab处理的发射数据可以通过USB接口下载到数据FLASH中,并且可以自由的进行更换,从而可以方便地验证不同的定位算法。该平台经初步实测,证明能够满足算法验证的要求。     

MIPS指令集多核处理器信令处理能力评估

通用高性能处理器在信令处理上有着广泛的应用,但有功耗较高的缺点。基于MIPS指令集的低功耗多核处理器的能效比较高,但信令处理能力不明确。本文采用密集内存访问的方法对处理器的信令处理能力进行评价。通过对MIPS指令集多核处理器和X86处理器的比较,得出MIPS多核处理器在信令处理能力和功效比上均有优势。以GTP为例在MIPS架构多核处理器和X86架构处理器上分别实现并进行性能测试。测试结果表明本文所述性能评价方式比较合理,同时也证明MIPS多核处理器可以用作信令处理,能效比显著高于通用高性能处理器。     

基于事件驱动的新型处理器的研究与应用

针对现代电子设计低成本、高效率、高灵活性的特点,研究了一种新型的处理器：事件驱动多核心处理器。通过对这种处理器基本构架的研究,以及采用新型处理器与采用传统控制器设计差异的对比,分析出该处理器具有性能高、实时性强、易编程等优点。最后,提出了一种新的设计方法：硬件设计软件化,给众多电子系统设计提供新的思路和参考。