Design of thermal imprinting system with uniform residual thickness

A new thermal imprinting system for the printed circuit boards (PCBs) with both large areas and fine conducting lines was developed adopting hot airs with a high pressure. Several small nickel stamps were used to cover the large area, and the stamps were replicated from an electroforming process, in addition, a vacuum jig was utilized to avoid bubbles captured in resins or imprinted interfaces. Stefan’s equation was used to estimate residual thicknesses of the imprinted resins, and effects of imprinting conditions on the residual thickness were investigated from numerical analyses to confirm process profiles and specifications of the developed equipment. The results show that the developed imprinting system can remarkably improve the uniformity of the residual thickness after imprinting, as compared with those of the conventional press, in spite of the thickness difference between the used stamps.     

场与路还是合并为好

为培育本科生创新能力而树立牢固基础,本文建议将目前大学本科电类专业分设的“电路”课和“课和”电磁场课合并为“电工基础”课。并就此提出了四点理由。     

A 12-b, 150 MHz Sample/s CMOS Current Steering D/A Converter with Gradient Error Compensation

This paper discusses a circuit of 12-b, 150 MHz Sample/s current steering DAC with hierarchical symmetrical switching sequences which will compensate gradient error. The circuit of 12-b DAC employs segmented architecture, the least significant bits (LSB's) steer a binary weighted array, while the most significant bits (MSB's) are thermometer decoded and steer a unary array. The measured differential nonlinearity and integral nonlinearity are ± 0.6 least significant bit (LSB) and ±0.9 LSB, respectively. The output spectrum of the DAC is −63 dB with an input frequency of 30 MHz at 150 MHz conversion rate. The circuit is fabricated in 0.5 μ μm, two-poly two-metal, 5.0 V, mixed-signal CMOS process and occupies 1.27 × 0.96 mm, when operating at 150 MHz Sample/s, it dissipates 91.6 mW from 5.0 V power supply which is much lower than those of [1]. Jinguang Jiang received the M.Sc. degree from Hunan University, Hunan, China, in 1998 and the PhD degree from Hunan University, Hunan, China, in 2003, all in Electrical Engineering. He is currently a Postdoctoral fellow of Control Science and Engineering in the Faculty of Electrical and Information Engineering at the University of Hunan. His interests are mode distinguish and intelligent system, intelligent signal process, low-power and low-voltage analog integrated circuits design. Bo Wang received the M.Sc. degree from Southeast University, China, in 1998. He is currently as a senior analog design engineer working at Caretta Integrated Circuits, Shanghai, China. His interests are high-speed analog IC design and analog system modeling and analysis. Yaonan Wang received the M.Sc. degree from Hunan University, Hunan, China, in 1991 and the Ph.D. degree from Hunan University, Hunan, China, in 1994, all in Control Theory and Control Engineering. He is currently a Professor and dean of school of Electrical and Information Engineering at the University of Hunan. He is engaged in research of intelligent control, intelligent signal process, image distinguish and its application.     

三相桥式全控整流实验装置的设计与研制

结合三相桥式全控整流电路的基本原理,研制出了触发电路以集成芯片KC04和KC41为中心的三相全控式整流装置,并具体介绍了每个功能模块的工作原理。该装置可用于发电机励磁仿真实验,实现励磁的全工况自动调节;还可应用于直流电机调速系统、同步电机传动系统、通用直流电源、UPS等,也是交流电机传动系统相控交交变频器的基本单元。自研制成功以来,运行状态良好。     

线性变厚度圆盘径向振动及其等效电路研究

研究了厚度沿半径方向线性变化的盘形聚能器的超声径向振动,导出了其机电类比等效电路图。从等效电路得出了其径向共振频率方程和公式。利用FEM进行了数值模拟,并从实验上进行了验证,理论与实验符合较好,为超声径向振动盘形聚能器的工程设计提供了一种便捷的分析方法。     

一种智能化漏电保护芯片的设计

提出了一种智能化漏电保护芯片。电路基于0.6μm CMOS工艺、采用数模混合信号设计,并用全定制的方法实现。与现有模拟漏电保护芯片相比,该芯片具有较高的智能化:对输入信号是否有效进行辨识,以排除干扰,减少误动作;采用数字延时代替现有的RC延时方式,大大提高了控制精度及三级匹配;三级保护的不同应用环境的可编程性;实现智能化开关控制;具有报警功能,保障安全。由于芯片的大部分功能由数字电路实现,大大降低了功耗。通过采用全定制的方法,优化电路和版图设计,减少了芯片面积,降低了成本。     

应用LPM简化CPLD器件开发的探讨

随着EDA技术的发展,数字逻辑系统的规模越来越大、集成度也越来越高,而产品的上市时间日益缩短。面对如此压力,设计者单纯地应用硬件描述语言或原理图来应付,并不是一件简单的事情。通过引入支持LPM的EDA软件工具,设计者就可以快速地设计出结构独立且硅片利用率高的产品。以基于LPM ROM设计的7段显示译码电路为例,详细阐述了应用LPM模块简化CPLD器件开发的方法。     

中小屏幕TFT-LCD驱动芯片的输出缓冲电路

在分析中小屏幕TFT-LCD驱动芯片的负荷特性的基础上,提出了一种新型的驱动电压输出缓冲电路结构.通过负反馈动态控制输出级的工作状态,具有交替提供拉电流和灌电流的驱动能力,可有效抑制输出电压的波动.与传统的两级运算放大器电路相比,该电路结构简单,稳定性能好,降低了静态功耗并节省了芯片面积.采用0.25μm CMOS工艺设计并实现了两种不同输出电压的缓冲电路.HSPICE仿真结果表明,输出电压缓冲电路的静态电流为3μA,Offset电压小于±2mV.同时,当TFT-LCD的驱动电压在-8～ 16V之间切换时,输出电压的波动范围小于±0.4V,输出电压的恢复时间小于7μs.经对工程样片的测试知,其性能完全满足中小屏幕TFT-LCD驱动控制芯片的要求.     

波峰焊接工艺技术的研究

作为一种传统焊接技术,目前波峰焊依然在电子制造领域发挥着积极作用。本文介绍了波峰焊接技术的原理,并分别从焊接前的质量控制、生产工艺材料及工艺参数这三个方面探讨了提高波峰焊质量的有效方法。     

A Low Power Dissipation Technique for a Low Voltage OTA

This paper proposes a novel low power dissipation technique for a low voltage OTA. A conventional low power OTA with a class AB input stage is not suitable for a low voltage operation (±1.5 V supply voltages), because it uses composite transistors (referred to CMOS pair) which has a large threshold voltage. On the other hand, the tail-current type OTA needs a large tail-current value to obtain a sufficient input range at the expense of power dissipation. Therefore, the conventional tail-current type OTA has a trade-off between the input range and the power dissipation to the tail-current value. The trade-off can be eliminated by the proposed technique. The technique exploits negative feedback control including a current amplifier and a minimum current selecting circuit. The proposed technique was used on Wang's OTA to create another OTA, named Low Power Wang's OTA. Also, SPICE simulations are used to verify the efficiency of Low Power Wang's OTA. Although the static power of Low Power Wang's OTA is 122 W, it has a sufficient input range, whereas conventional Wang's OTA needs 703 W to obtain a sufficient input range. However, we can say that as the input signal gets larger, the power of Low Power Wang's OTA becomes larger.