多路宽带带状线功率分配器设计分析

宽带功率分配器是电子系统的重要部件。提出了宽带带状线功率分配器的设计方案,详细论述了二功分器、八功分器的设计方法,研究了该方法在工程中存在的问题及解决办法。应用电路与电磁场仿真软件进行了仿真,制作了一个3～10 GHz的功率分配器样件,对样件进行了指标测试,详细分析了测试结果与仿真结果存在差异的原因。     

Electrical Impedance Spectroscopic Study of CNT/Ethylene-alt-CO/Propylene-alt-CO Polyketones Nanocomposite

Impedance spectroscopy was utilized to investigate the dielectric properties, ac conductivity and charge transport mechanisms in propylene-alt-CO/ethylene-alt-CO (EPEC) random terpolymer filled with multi-walled carbon nanotubes (MWCNT) as a function of nanofiller content, frequency, and temperature. Equivalent resistor-capacitor (RC) circuit models were proposed to describe the impedance characteristics of the unfilled terpolymer and the nanocomposite at different temperatures. For the nanocomposites, the ac conductivity tended to be frequency independent at low frequencies. At high frequencies, the ac conductivity increased with frequency. The dc conductivity (i.e., plateau of the ac conductivity at low frequencies) at room temperature increased from 10^?9 (Ω·m)^?1 for the unfilled polymer to l0^?3 (Ω·m)^?1 for the 6 wt% MWCNT/EPEC nanocomposite. At low temperatures, the equivalent RC model for EPEC-0 and EPEC-2 was found to consist of a parallel RC circuit. However, for 6 wt% MWCNT/EPEC nanocomposite, an RC model consisting of an R/constant phase element (CPE) circuit and a resistor in series was required to describe the impedance behavior of the nanocomposite.     

Printed Circuit Board-Based Electrolyte Regulator for Laminar Microfluidics

The trench on a printed circuit board was reconstructed to fabricate a microfluidic framework that allows low-cost production for small quantities and integration with multifunctional elements. An on-chip electrolyte regulator was thus proposed on this platform to analyze diffusion properties in laminar flow. A numerical model was developed, highlighting the interplay between the electrolyte migration and hydrodynamic properties. Solutions with dissolved sodium chloride were simulated and experimentally tested for the regulation of electrical conductivity under the guidance of the normalized Nernst-Planck equation. The diffusion mechanism and the resulting concentration field were demonstrated in detail. This approach provides a satisfactory manufacturing method and a useful tool for integrated microfluidic systems.     

电子电路故障检测技术探索

本文深入探究电子电路障碍检测技术出现故障的原因,对电子电路故障的检测技术实施具体分析。     

Unity direct chain with feedback series impedance based innovative negative group delay circuit

An innovative negative group delay (NGD) circuit theory on unity direct chain (UDC) topology is developed in this paper. The NGD UDC cells are based on the operational amplifier adder with feedback series impedance. Innovative topologies of high-pass NGD UDC cell composed of RL-series network, all-pass RC-parallel network and low-pass RC-series network are identified. It is a first time that all-pass NGD original topologies are defined. NGD analyses and synthesis methods of each NGD UDC cells are provided. The UDC cell based NGD functions are validated with SPICE simulations. The proofs-of-concept (POC) of UDCs behave as all-pass and low-pass NGD functions with group delay equal to −1 ms at very low frequencies. The low-pass NGD cut-off frequency is 424 Hz. The high pass NGD circuit generates −1 µs at the optimal NGD frequency of about 5.15 kHz. Further analysis of the operational amplifier gain and bandwidth effects is performed. The operational amplifier gain affects significantly the NGD level and bandwidth for the all considered UDC cells. Nevertheless, only the RC-parallel feedback based UDC cell is particularly sensitive to the operational bandwidth.     

Inrush current estimation and hot-swapping for safe parallel battery pack

ABSTRACT

Batteries used in electric vehicles and microgrid applications use battery modules connected in series to satisfy the voltage required for each system, and battery modules are connected in parallel to increase capacity. In this parallel connected system, in order to disconnect and reconnect a specific battery module or to reconnect a new battery module, the battery module to be newly connected should have a small state of charge (SOC) difference from the existing battery modules. In particular, when a new battery is to be connected under a load current, there is a problem that excessive inrush current may occur in a specific battery module due to the load current distributed to each module and the current due to the SOC difference. Therefore, in this paper, we propose a method of estimating the inrush current through an equivalent electrical modelling analysis for the case where a battery module is newly added in a system in which the battery modules are connected in parallel. In addition, the power management algorithm for the battery pack system with inrush current estimation is presented. The proposed method is validated through simulations and experiments of a battery pack system in which 10 battery modules of 710V and 120Ah are connected in parallel.     

Substrate noise isolation improvement in a single-well standard CMOS process

This work describes a fully CMOS compatible methodology, which makes available a pseudo deep n-well in single-well standard CMOS process. The proposed method is based on mask manipulation to accommodate the field implant p-type region into the n-well, and does not require any additional masks or modification in the CMOS process flow. According to the experimental results, the floating NMOS made available by the methodology shows a reduction in the threshold voltage, which implies a slight improvement in its performance, when compared with its standard NMOS counterpart. It was also experimentally demonstrated up to 3 GHz, that the guard-ring field implant/pseudo deep n-well proposed structure improves substrate noise isolation when compared to the classical p+ guard-ring, with a maximum improvement above 20 dB for low frequencies and a minimum of 4 dB at 3 GHz.     

Flexible active matrix addressed displays manufactured by printing and coating techniques

A flexible electrochromic active matrix addressed display, including 8 × 8 pixels, is demonstrated by using solution processing based on standard printing and coating manufacturing techniques. Each organic electrochromic display (OECD) pixel and its corresponding organic electrochemical transistor (OECT) are located on different sides of the flexible PET substrate. Electronic vias generated through the plastic substrate connects each OECD pixel with one addressing OECT. When comparing this display with actively addressed OECDs with all its components located on the same side, the present approach based on this electronic via substrate provides an enhanced pixel resolution and a relatively more simplified manufacturing process. © 2012 Wiley Periodicals, Inc. J Polym Sci Part B: Polym Phys, 2012     

Grey Entropy Relation Algorithm of Choosing the Optimum Diagnostic Nodes in Analogue Circuits

Choosing the optimum diagnostic nodes is helpful to increase the accuracy and the efficiency of circuits fault diagnosis. Grey entropy relation algorithm is proposed to choose the optimum diagnostic nodes of analogue circuits in this paper. Analogue circuits are regarded as grey system. Grey relation analysis and grey entropy analysis are combined to grey entropy relation algorithm. Grey entropy relation algorithm is used to quantify the relationship between the diagnostic nodes and fault components. The relevance between the diagnostic nodes and fault components can be evaluated by grey entropy relation degrees. According to the rank order of grey entropy relation degrees, the optimum diagnostic nodes of analogue circuits can be selected objectively and accurately. An example of fault diagnosis is presented to verify the validity of the optimum diagnostic nodes.     

A semidefinite programming approach to the hypergraph minimum bisection problem

The hypergraph minimum bisection (HMB) problem is the problem of partitioning the vertices of a hypergraph into two sets of equal size so that the total weight of hyperedges crossing the sets is minimized. HMB is an NP-hard problem that arises in numerous applications – for example, in digital circuit design. Although many heuristics have been proposed for HMB, there has been no known mathematical program that is equivalent to HMB. As a means of shedding light on HMB, we study the equivalent, complement problem of HMB (called CHMB), which attempts to maximize the total weight of non-crossing hyperedges. We formulate CHMB as a quadratically constrained quadratic program, considering its semidefinite programming relaxation and providing computational results on digital circuit partitioning benchmark problems. We also provide results towards an approximation guarantee for CHMB.