Finite generation of powers of ideals

Suppose is a maximal ideal of a commutative integral domain and that some power of is finitely generated. We show that is finitely generated in each of the following cases: (i) is of height one, (ii) is integrally closed and , (iii) is a monoid domain over a field , where is a cancellative torsion-free monoid such that , and is the maximal ideal . We extend the above results to ideals of a reduced ring such that is Noetherian. We prove that a reduced ring is Noetherian if each prime ideal of has a power that is finitely generated. For each with , we establish existence of a -dimensional integral domain having a nonfinitely generated maximal ideal of height such that is -generated.

     

Adaptive anisotropic noise filtering for magnitude MR data

Conventional noise filtering schemes applied to magnitude magnetic resonance (MR) images tacitly assume Gauss distributed noise. Magnitude MR data, however, are Rice distributed. Not incorporating this knowledge leads inevitably to biased results, in particular when applying such filters in regions with low signal-to-noise ratio. In this work, we show how the Rice data probability distribution can be incorporated so as to construct a noise filter that is far less biased.     

Behavioral-Level Performance and Power Exploration of Data-Intensive Applications Mapped on Programmable Processors

The continuous increase of the computational power of programmable processors has established them as an attractive design alternative, for implementation of the most computationally intensive applications, like video compression. To enforce this trend, designers implementing applications on programmable platforms have to be provided with reliable and in-depth data and instruction analysis that will allow for the early selection of the most appropriate application for a given set of specifications. To address this need, we introduce a new methodology for early and accurate estimation of the number of instructions required for the execution of an application, together with the number of data memory transfers on a programmable processor. The high-level estimation is achieved by a series of mathematical formulas; these describe not only the arithmetic operations of an application, but also its control and addressing operations, if it is executed on a programmable core. The comparative study, which is done using three popular processors (ARM, MIPS, and Pentium), shows the high efficiency and accuracy of the methodology proposed, in terms of the number of executed (micro-)instructions (i.e. performance) and the number of data memory transfers (i.e. memory power consumption). Using the proposed methodology we estimated an average deviation of 23% in our estimated figures compared with the measurements taken from the real execution on the CPUs. This work was supported by the project PENED ’99 ED501 funded by GSRT of the Greek Ministry of Development, and the project PRENED ’99 KE 874 funded by the Research Committee of the Democritus University of Thrace. This work was partially sponsored by a scholarship from the Public Benefit Foundation of Alexander S. Onassis (Minas Dasygenis). Nikolaos Kroupis was born in Trikala in 1976. He receiver the engineering degree and Ms.C. degree in Department of Electrical and Computer Engineering from Democritous University of Thrace, Greece, in 2000 and 2002, respectively. Since 2002 he has been a Ph.D. student at the Laboratory of Electrical and Electronic Materials Technology. His research interests are in software/hardware co-design of embedded system for signal processing applications. Nikos D. Zervas received a Diploma in Electrical & Computer Engineering from University of Patras, Greece in 1997. He received the Ph.D. degree in the Department of Electrical and Computer Engineering of the same University in 2004. His research interests are in the area of high-level, power optimization techniques and methodologies for multimedia and telecommunication applications. He has received an award from IEEE Computer Society in the context of Low-Power Design Contest of 2000 IEEE Computer Elements Mesa Workshop. Mr. Zervas is a member of the IEEE, ACM and of the Technical Chamber of Greece. Minas Dasygenis was born in Thessaloniki in 1976. He received his Diploma in Electrical and Computer Engineering in 1999, from the Democritus University of Thrace, Greece, and for his diploma Thesis he was honored by The Technical Chamber of Greece and Ericsson Hellas. In 2005, he received his PhD Degree from the Democritus University of Thrace. His research interests include low-power VLSI design of arithmetic circuits, residue number system, embedded architectures, DSPs, hardware/ software codesign and IT security. He has published more than 20 papers in international journals and conferences and he has been a principal researcher in three European research projects. Konstantinos Tatas received his degree in Electrical and Computer Engineering from the Democritus University of Thrace, Greece in 1999. He received his Ph.D. in the VLSI Design and Testing Center in the same University by June 2005. He has been employed as an RTL designer in INTRACOM SA, Greece between 2000 and 2003. His research interests include low-power VLSI design of DSP and multimedia systems, computer arithmetic, IP core design and design for reuse. Antonios Argyriou received the degree in Electrical and Computer engineering from the Democritous University of Thrace, Greece, in 2001, and the M.S. and Ph.D. degrees in Electrical and Computer engineering from the Georgia Institute of Technology, Atlanta, in 2003 and 2005, respectively. His primary research interests include wireless networks, mobile computing and multimedia communications. He is a member of the IEEE and ACM. Dimitrios Soudris received his Diploma in Electrical Engineering from the University of Patras, Greece, in 1987. He received the Ph.D. Degree in Electrical Engineering, from the University of Patras in 1992. He is currently working as Ass. Professor in Dept. of Electrical and Computer Engineering, Democritus University of Thrace, Greece. His research interests include low power design, parallel architectures, embedded systems design, and VLSI signal processing. He has published more than 140 papers in international journals and conferences. He was leader and principal investigator in numerous research projects funded from the Greek Government and Industry as well as the European Commission (ESPRIT II-III-IV and 5th and 6th IST). He has served as General Chair and Program Chair for the International Workshop on Power and Timing Modelling, Optimisation, and Simulation (PATMOS). He received an award from INTEL and IBM for the project results of LPGD #25256 (ESPRIT IV). He is a member of the IEEE, the VLSI Systems and Applications Technical Committee of IEEE CAS and the ACM. Antonios Thanailakis was born in Greece on August 5, 1940. He received B.Sc. degrees in physics and electrical engineering from the University of Thessaloniki, Greece, 1964 and 1968, respectively, and the Msc. and Ph.D. Degrees in electrical engineering and electronics from UMIST, Manchester, U.K. in 1968 and 1971, respectively. He has been a Professor of Microelectronics in Dept. of Electrical and Computer Eng., Democritus Univ. of Thrace, Xanthi, Greece, since 1977. He has been active in electronic device and VLSI system design research since 1968. His current research activities include microelectronic devices and VLSI systems design. He has published a great number of scientific and technical papers, as well as five textbooks. He was leader for carrying out research and development projects funded by Greece, EU, or other organizations on various topics of Microlectronics and VLSI Systems Design (e.g. NATO, ESPRIT, ACTS, STRIDE).     

Analysis and Algorithm Simulation of Forward-link CDMA Signal Spectral Regrowth

In CDMA systems, the Radio Frequency Power Amplifier (RF PA) is the most important device. As is known, the nonlinearity of the power amplifier always attracts people’s attention. Since the envelope of CDMA is time-varying, it is of great significance to calculate the distortion caused by the transmitter in the communication system of CDMA. The odd order nonlinear intermodulations of the transmitter expand the frequency spectrum of the CDMA signal, which is called spectral regrowth.…     

频谱分析在DOA估计中的应用

子空间方法的本质是利用噪声子空间与阵列流型之间的正交性对阵列空间采样数据中空间频率进行估计。文章从快拍数据频谱分析的角度来实现这一估计。文中详细推导了窄带情况下DOA和快拍频谱的关系,提出了两种运算量较小、便于工程实现的利用FFT估计窄带DOA的方法。在宽带情况下,详细推导了宽带信号空间频率和时间频率的关系,推导出宽带信号频率对齐的方法,提出了两种直接利用对齐结果来估计宽带DOA的新方法。文中所用方法运算量小,便于硬件实现,仿真结果证明了算法的有效性。     

一种基于双级支线功分／功合网络的毫米波固态功率放大器

本文综合考虑影响合成效率的因素以及毫米波段的工艺精度，设计了一种改进型的双级支线功分／功合网络，改善了驻波比和幅相特性，保证了良好的合成效率．并在此基础上，研制了一种高性能的毫米波固态功率放大器，在38～40GH：的通带内，实现34．8dBm输出功率，55dB增益的良好电性能，具有结构简单、加工简易等特点.     

L-波段掺铒光纤放大器的优化设计

针对L-band的泵浦效率不高的缺点改进了光链路:在EDFA的前端加入一个光纤环行镜用来反射铒纤产生的后向放大自发发射谱(ASE),通过实验和数值分析发现,在较大的波长范围内光纤环形镜(FLM)可以反射后向ASE的能量,平均增益在12．5 dB以上,提高了泵浦效率,证明这一结构对提高L-band EDEA的转换效率是简单有效的。     

Second Harmonic Power Generation from GaAs-Impatt Diodes at 210 GHz

Investigations of GaAs-IMPATT diodes as self-pumped frequency doublers are carried out both, theoretically and experimentally. Optimization criterions are specified and first experimental results are presented. 1 mW output power has been achieved in the harmonic mode at 210 GHz.     

大功率激光功率密度分布的简易测试

本文提出一种测量连续输出大功率红外激光功率密度分布的实用方法,并详细分析其物理机理。     

沉积物中石英ESR测年功率饱和效应的初步研究

介绍了几组沉积物中石英ESR功率饱和效应的基础实验情况,认为在用石英进行ESR测年时,微波功率的选择是一个重要参数,它直接影响累积剂量(AD)的求取,从而严重影响测年结果。在某些特定的地质环境下(如黄土,海洋沉积物),采用比较高的微波功率,可从沉积物石英的E'心得到较老沉积物(大于50万年)可信的ESR年代。