一种锁相式频率合成器的设计

介绍了一种锁相式频率合成器的总体设计和电路结构设计,并进行了实验制作。设计的电路工作频率在１００ＭＨｚ以上,可广泛应用于雷达,航空,航天,通讯,导航,锁相环路等领域。     

A wide-range programmable frequency synthesizer based on a finite state machine filter

In this article, an FPGA-based design and implementation of a fully digital wide-range programmable frequency synthesizer based on a finite state machine filter is presented. The advantages of the proposed architecture are that, it simultaneously generates a high frequency signal from a low frequency reference signal (i.e. synthesising), and synchronising the two signals (signals have the same phase, or a constant difference) without jitter accumulation issue. The architecture is portable and can be easily implemented for various platforms, such as FPGAs and integrated circuits. The frequency synthesizer circuit can be used as a part of SERDES devices in intra/inter chip communication in system-on-chip (SoC). The proposed circuit is designed using Verilog language and synthesized for the Altera DE2-70 development board, with the Cyclone II (EP2C35F672C6) device on board. Simulation and experimental results are included; they prove the synthesizing and tracking features of the proposed architecture. The generated clock signal frequency of a range from 19.8?MHz to 440?MHz is synchronized to the input reference clock with a frequency step of 0.12?MHz.     

基于Sagnac干涉仪的级联型梳状滤波器

密集波分复用(DWDM)系统光信道数量的增加,使得与DWDM技术有关的各种光学滤波器技术成为当前光纤通信领域的研究热点.高双折射(HiBi)光纤环具有易于制作、性能稳定以及良好的滤波特性等特点,近年来受到广泛关注;通过增加Sagnac环内HiBi光纤和偏振控制器的个数,或者采用多个HiBi光纤Sagnac环的级联形式,...     

C频段宽带低杂散频率合成器的设计与实现

在此介绍了小数分频锁相频率合成器的相关理论。设计一个带宽为580 MHz、杂散抑制度≤-60 d Bc、相位噪声≤-85 d Bc/Hz@10 k Hz的C频段宽带低杂散频率合成器。利用双环锁相频率合成技术和小数分频锁相技术,实现了宽带、低杂散的锁相频率合成器的设计。最后经过测试近端杂散指标≤-60 d Bc,远端杂散指标≤-70 d Bc,偏移10 k Hz的相位噪声为-89.95 d Bc/Hz,技术指标都优于设计要求。     

APPLICATION OF REDUCIBLE CUTSET AND REDUCIBLE LOOP TO ANALYSIS OF THE NETWORK

New concepts of reducible independent cutset and reducible independent loop are developedthrough an analysis of the ladder network.A new analytic method,named structural analysis method,is pres-entod.It evaluates the controllability and observability of a network based on its structure rather than onits state equation.Some problems in the conventional network analysis can be solved using this method.Re-sults obtained by this method are in good agreement with those obtained by that of state space analysis,butthis method is much simpler in use.A practical example is given.     

改进的任意基FFT整序算法

本文提出了一种改进的适合于任意基ＦＦＴ变换的整序算法,改进整序算法采用循环嵌套结构,减少了运算量,实验结果表明,改进整序算法的运算时间较其它整序算法少。     

基于模糊PI控制的开关磁阻电机调速系统的MATLAB仿真

为改善开关磁阻电机（简称SRM ）的非线性特性问题,提高开关磁阻电机调速系统（简称SRD ）的响应特性和稳定性,对 SRD 采用双闭环控制,即速度外环和电流内环。其中速度外环采用模糊 PI 控制技术,借助 MATLAB/SIMULNK对系统进行建模和仿真。将其仿真结果与常规PI仿真结果进行分析比较。结果表明基于模糊PI控制的开关磁阻电机调速系统,响应速度提高了40%,超调量减小1.2%,调节精度和稳定性都大大提高,系统震荡也明显减小。     

基于锁定时间分析的锁相环频率合成器

提出了一种新的针对采用二阶无源滤波器的锁相环频率合成器锁定时间的估算公式,并通过仿真软件及实测结果对该公式进行了验证。基于该估算公式,设计了一种具有快速锁定功能的锁相环频率合成器。实验结果表明该锁相环频率合成器锁定时间小于7μs,具有快速锁定的功能。同时该锁相环还具有良好的相位噪声性能,对于32GHz输出信号相位噪声为-72dBc/Hz@1kHz以及-90dBc/Hz@1MHz。     

非相参多点源抗反辐射武器诱偏效果半实物辐射式仿真研究

简述了非相参多点源抗反辐射武器诱偏原理,提出了非相参多点源抗反辐射武器诱偏效果半实物仿真试验方法。通过对半实物仿真结果与理论分析、实弹打靶结果的比对分析,总结了试验方法对评估非相参多点源抗反辐射武器诱偏的有效性。     

Isospin violating mechanisms in quarkonium hadronic decays

We analyze the φ meson production in e^＋e^- →ωπ^0 as a probe for studying the isospin violation mechanisms. By clarifying the dynamic sources causing the isospin violation, we succeed in quantifying those mechanisms with the help of the recent KLOE data. Hence, the φ→ωπ^0 branching ratio is extracted. We find that apart from the electromagnetic （EM） transitions, the strong transition via intermediate kaon loops plays an important role in understanding the cross section and its lineshape.