人工电源网络阻抗高频特性及其校准精度研究

本文根据人工电源网络的原理图,建立了阻抗测量的高频寄生参数模型,并分析了适配器寄生参数以及各独立元件在电路中的作用。通过分析接地和金属板的两种基本串扰形式,建立人工电源网络相应的等效电路模型,运用MATLAB仿真软件仿真分析了两种模型下的寄生参数对阻抗的影响。仿真得到的随频率变化的曲线表明,寄生参数及其耦合关系对阻抗测量有重要影响。     

多谱段线列红外探测器读出电路设计优化

集成电路制造技术的发展使单芯片集成多谱段红外探测器成为可能,其中长线列红外探测器读出电路设计遇到的挑战之一就是寄生效应。针对一款多谱段长线列用读出电路在最小积分电容时行间输出电平差异显著,导致成像出现明暗条纹的现象进行了测试分析,得出复杂的电路版图寄生效应是主要原因。通过优化设计及流片验证,解决了寄生效应导致的成像明暗条纹问题。     

一个1.2伏CMOS0.13微米工艺19.2毫瓦10位30兆采样率流水线模数转换器

A 10-bit 30-MS/s pipelined analog-to-digital converter (ADC) is presented. For the sake of lower power and area, the pipelined stages are scaled in current and area, and op amps are shared between the successive stages. The ADC is realized in the 0.13-μ m 1-poly 8-copper mixed signal CMOS process operating at 1.2-V supply voltage. Design approaches are discussed to overcome the challenges associated with this choice of process and supply voltage, such as limited dynamic range, poor analog characteristic devices, the limited linearity of analog switches and the embedded sub-1-V bandgap voltage reference. Measured results show that the ADC achieves 55.1-dB signal-to-noise and distortion ratio, 67.5-dB spurious free dynamic range and 19.2-mW power under conditions of 30 MSPS and 10.7-MHz input signal. The FoM is 0.33 pJ/step. The peak integral and differential nonlinearities are 1.13 LSB and 0.77 LSB, respectively. The ADC core area is 0.94 mm².     

Ba_(0.5)Sr_(0.5)TiO_3薄膜电容的尺寸效应研究

采用射频磁控溅射和微细加工技术制备了不同尺寸的钛酸锶钡(Ba0.5Sr0.5TiO3,BST)平行板电容,研究了低频和高频条件下不同尺寸BST平行板电容的电容密度和Q值的变化情况。结果表明,由于存在边缘效应,BST薄膜电容的电容密度及Q值都具有尺寸效应。低频时,随着电容面积增大,电容密度减小,Q值增大。高频时,随着电容面积增大,电容密度及Q值减小。     

非理想条件下有源箝位正激电路小信号模型分析

有源箝位正激变换器相对于其它复位方式,有很多优点,然而当输入源和负载发生变化时,却造成系统的不稳定性。文中分析了有源箝位正激变换器中复位电容对其小信号特性的影响,在考虑原边主管导通电阻的基础上,应用状态空间平均法,首次推导其小信号模型,并运用Mathcad仿真了该模型的频率特性,结合控制理论根之和的概念,分析了非理想条件下的有源箝位正激电路的小信号模型。     

用CXA3067AM实现宽带FSK接收电路

CXA3067AM是一个高度集成的宽带FSK接收器,具有4种可选的基准频率。介绍基于CXA3067AM的宽带FSK接收电路的工作原理、频道选择控制、电感线圈绕制以及电路设计应注意的问题。该宽带FSK接收电路设计简单,频道调节灵活方便。通过合理布局电路元件,可以有效抑制寄生振荡和减少相位噪声。     

注BF^＋2MOS电容的电离辐射效应

着重研究了γ辐照后,不同偏置情况下,N—Sub MOS电容的高频C—V曲线随B_2~+注入剂量的变化,并对实验结果进行了分析讨论。     

铁电电容模型及其在铁电存储器中的应用

近年来,集成铁电学（integrated ferroelectrics)迅速发展。铁电体是一种特殊的电介质,在不存在外场的情况下,它仍然可以保持一个自发的极化强度。其极化方向在外电场的作用下可以发生反转,表现出特殊的非线性介电行为,即电滞回线。文章讨论了铁电电容模型的SPICE实现。首先介绍电容模型的实现,然后结合2T－2C铁电存储单元的工作原理,验证了该模型。最后,给出了一个完整的32位铁电存储器的电路仿真结果。该结果可以非常容易地推广到更大容量的铁电存储器中。     

(Ca,Sr)(Zr,Ti)O_3系抗还原高频介质瓷料的研究

采用固相合成法制备了(Ca,Sr)(Zr,Ti)O3(简称CSZT)系电容器陶瓷材料,研究了主晶相组分对所制材料介电性能的影响。结果表明:通过调整主晶相CSZT中各组分的配比,再加入适量的烧结助剂,能得到一种可在还原气氛中烧结的高频介质瓷料,该瓷料可与镍内电极共烧,其相对介电常数约为89,介质损耗(tanδ)小于5×10–4,绝缘电阻达到1012Ω,介电常数温度系数为–1 037×10–6/℃。     

MIS characterization and modeling of the electrical properties of the epitaxial Caf2/Si(111) interface

CaF₂ layers have grown by molecular beam epitaxy on bothn-type andp- type Si(111). Capacitance-voltage (C-V) and current-voltage (I-V) measurements have been made on metal-insulator-semiconductor (MIS) capacitors to characterize these structures. For devices onp-type Si, C-V characteristics show only the insulator value of the capacitance over a wide range of applied voltages, indicating an accumulated surface. At room temperature, C-V characteristics ofn-type devices show the minimum value of the capacitance (corresponding to inversion) for small voltages, but modulation of the capacitance at larger voltages. At 200 K, this modulation is no longer present in the C-V curves. I-V curves show a rapid increase in the leakage current at relatively low fields at room temperature, and this leakage decreases dramatically with temperature. These results are largely independent of cleaning procedure, growth temperature, and the degree of misalignment of the substrate. The characteristics are modeled by assuming the Fermi level to be pinned at the valence-band edge, and the modulation in the C-V characteristics ofn-type samples to be driven by leakage currents. Work done at GE while a graduate student in the School of Electrical Engineering, Cornell University. Present address: Jet Propulsion Laboratory, 4800 Oak Grove Dr., Pasadena, CA 91109.