短波射频数字化接收机的设计与实现

针对传统中频数字化接收机复杂度高、灵活性差等问题,设计并实现了一种新型短波射频数字化接收机.该接收机由A/D、数字下变频器(DDC)、DSP、D/A、CPLD等几部分组成,实现了短波信号的射频数字化处理.详细介绍了接收机的设计方案,并对常见的调幅(AM)、等幅报(CW)、单边带(ISB)等信号进行了接收测试.在输入电平为-103～0 dB动态范围内,解调输出质量都能达到12 dB左右信纳得(SND).     

ΣΔA/D转换及其在CMOS图像传感器中的应用

介绍了过采样ΣΔA/D转换器的原理,分析了这种转换器精度高、结构简单、易于实现的优点以及符合CMOS工艺集成要求的特点。根据这些特点指出,过采样ΣΔA/D更适合于CMOS图像传感系统并易于制造片上系统。最后,指出了过采样ΣΔA/D转换器在CMOS图像传感领域的应用特点。     

Low-clock-speed time-interleaved architecture for a polar delta–sigma modulator transmitter

The polar delta–sigma modulator (DSM) transmitter architecture exhibits good coding efficiency and can be used for software-defined radio applications. However, the necessity of high clock speed is one of the major drawbacks of using this transmitter architecture. This study proposes a low-complexity time-interleaved architecture for the polar DSM transmitter baseband part to reduce the clock speed requirement of the polar DSM transmitter using an upsampling technique. Simulations show that using the proposed four-branch time-interleaved polar DSM transmitter baseband part, the clock speed requirement of the transmitter is reduced by four times without degrading the signal-to-noise-and-distortion ratio.