单向双端口SRAM的测试算法

描述了一种检测单向双端口 SRAM失效的算法 ,采用了基于字的测试方法 ,可以有效地检测字间失效、字内失效和同时读写失效 ,具有失效覆盖率高和测试时间复杂度低的优点。     

BE-TANOS: Feasibility and technology limitations

The aim of this work is to investigate the physical mechanisms behind the write/erase and retention performances of band gap engineering (BE) layers used as tunnel oxide in charge trap memory stack. The investigation of the BE layers alone will be completed with the analyses of its integration within a TANOS (TaN/Alumina/Nitride/Oxide/Silicon) stack, pointing out the correlation between electrical performance and reliability limits.Good write/erase/retention performances can be achieved with BE tunnel oxide by using silicon nitride layer integrated in SiO₂-Si₃N₄-SiO₂ stack, as long as all different mechanisms are taken into account in optimizing stack composition: hole injection which improves erase efficiency, charge trapping and de-trapping from the thin silicon nitride which causes program instabilities and initial charge loss which does not significantly impact long term retention. All these phenomena make very crucial the BE tunnel process control and difficult its use for multi-level application.     

A boosted voltage generator for low-voltage DRAMs

This paper proposes a new two-stage two-phase VPP charge pump configured in such a manner that the body effect and the threshold voltage loss are eliminated. The newly proposed circuit is fabricated using 0.18 μm triple-well CMOS process and the measurement result shows that the VPP level tracks 3VDD when VDD is above the threshold voltage.     

Total ionizing radiation-induced read bit-errors in toggle magnetoresistive random-access memory devices

The 1-Mb and 4-Mb commercial toggle magnetoresistive random-access memories(MRAMs) with 0.13 μm and 0.18-μm complementary metal–oxide–semiconductor(CMOS) process respectively and different magnetic tunneling junctions(MTJs) are irradiated with a Cobalt-60 gamma source. The electrical functions of devices during the irradiation and the room temperature annealing behavior are measured. Electrical failures are observed until the dose accumulates to 120-krad(Si) in 4-Mb MRAM while the 1-Mb MRAM keeps normal. Thus, the 0.13-μm process circuit exhibits better radiation tolerance than the 0.18-μm process circuit. However, a small quantity of read bit-errors randomly occurs only in 1-Mb MRAM during the irradiation while their electrical function is normal. It indicates that the store states of MTJ may be influenced by gamma radiation, although the electrical transport and magnetic properties are inherently immune to the radiation. We propose that the magnetic Compton scattering in the interaction of gamma ray with magnetic free layer may be the origin of the read bit-errors. Our results are useful for MRAM toward space application.     

Calamitic Blatter Radicals for Large-Area Solution-Coated Resistive Memories

Radical molecules exhibit fast redox kinetics, are widely explored for data processing and energy storage. However, the insulating aliphatic matrix isolates the radical units, thus resulting in a weak charge transporting ability. Herein, calamitic Blatter radicals (CBR) with highly conductive [1]benzothieno[3,2-b]benzothiophene (BTBT) as the conjugated backbone are designed and synthesized. It is found that bistable redox character associated with large conjugated backbone allows these Blatter radical derivatives to be switched with ON/OFF ratio reaching 10⁶ and retention time exceeding 10⁴ s in solution processed devices. In addition, these radicals are unveiled to perform tunable, multi-mode field-responsive resistance behaviors, including write-once-read-many (WORM), FLASH, and dynamic random access memory (DRAM), by molecular engineering strategy. This finding provides fundamental understanding for charge transferring dynamics and redox-switching mechanism of radical molecules with respect to electronic applications.     

Electric Field Gradient-Controlled Domain Switching for Size Effect-Resistant Multilevel Operations in HfO2-Based Ferroelectric Field-Effect Transistor

The ferroelectric field-effect transistor (FeFET) is a promising memory technology due to its high switching speed, low power consumption, and high capacity. Since the recent discovery of ferroelectricity in Si-doped HfO₂ thin films, HfO₂-based materials have received considerable interest for the development of FeFET, particularly considering their excellent complementary metal-oxide-semiconductor (CMOS) compatibility, relatively low permittivity, and high coercive field. However, the multilevel capability is limited by the device size, and multidomain switching tends to vanish when the channel length of the HfO₂-based FeFET approaches 30 nm. Here, multiple nonvolatile memory states are realized by tuning the electric field gradient across the Hf_0.5Zr_0.5O₂ (HZO) ferroelectric thin film along the channel direction of FeFET. The multi-step domain switching can be readily and directionally controlled in the HZO-FeFETs, with a very low variation. Moreover, multiple nonvolatile memory states or multi-step domain switching can be effectively controlled in the FeFETs with a channel length less than 20 nm. This study suggests the possibility to implement multilevel memory operations and mimic biological synapse functions in highly scaled HfO₂-based FeFETs.     

An Ultrafast Nonvolatile Memory with Low Operation Voltage for High-Speed and Low-Power Applications

Memory plays a vital role in modern information society. High-speed and low-power nonvolatile memory is urgently demanded in the era of big data. However, ultrafast nonvolatile memory with nanosecond-timescale operation speed and long-term retention is still unavailable. Herein, an ultrafast nonvolatile memory based on van der Waals heterostructure is proposed, where a charge-trapping material, graphdiyne (GDY), serves as the charge-trapping layer. With the band-engineered heterostructure and excellent charge-trapping capability of GDY, charges are directly injected into the GDY layer and are persistently captured by the trapping sites in GDY, which result in an ultrafast writing speed (8 ns), a low operation voltage (30 mV), and a long retention time (over 10⁴ s). Moreover, a high on/off ratio of 10⁶ is demonstrated by this memory, which enables the achievement of multibit storage with 6 discrete storage levels. This device fills the blank of ultrafast nonvolatile memory technology, which makes it a promising candidate for next-generation high-speed and low-power-consumption nonvolatile memory.     

A low power high speed MTJ based non-volatile SRAM cell for energy harvesting based IoT applications

Powering billions of devices is one of the most challenging barrier in achieving the future vision of IoT. Most of the sensor nodes for IoT based systems depend on battery as their power source and therefore fail to meet the design goals of lifetime power supply, cost, reliable sensing and transmission. Energy harvesting has the potential to supplant batteries and thus prevents frequent battery replacement. However, energy autonomous systems suffer from sudden power variations due to change in external natural sources and results in loss of data. The memory system is a main component which can improve or decrease performance dramatically. The latest versions of many computing system use chip multiprocessor (CMP) with on-chip cache memory organized as array of SRAM cell. In this paper, we outline the challenges involved with the efficient power supply causing power outage in energy autonomous/self-powered systems. Also, various techniques both at circuit level and system level are discussed which ensures reliable operation of IoT device during power failure. We review the emerging non-volatile memories and explore the possibility of integrating STT-MTJ as prospective candidate for low power solution to energy harvesting based IoT applications. An ultra-low power hybrid NV-SRAM cell is designed by integrating MTJ in the conventional 6T SRAM cell. The proposed LP8T2MTJ NV-SRAM cell is then analyzed using multiple key performance parameters including read/write energies, backup/restore energies, access times and noise margins. The proposed LP8T2MTJ cell is compared to conventional 6T SRAM counterpart indicating similar read and write performance. Also, comparison with the existing MTJ based NV-SRAM cells show 51–78% reduction in backup energy and 42–70% reduction in restore energy.     

Metal ion doped polymers as media for optical memories

Polymer materials are making an impact on optical storage technology to develop high information density and fast access type memories with a high read-out efficiency. The principle and advantages of three-dimensional (3-D) data storage in the form of interference patterns (holograms) have been outlined. Three different information storage materials have been developed by doping metal ions such as Cr(VI) and Fe(III) in water-soluble polymers, namely poly(vinyl alcohol) (PVA) and poly(acrylic acid) (PAA), which need no further thermal or chemical treatment. Volume transmission holograms have been recorded in dichromated poly(vinyl alcohol) (DCPVA), ferric chloride doped poly(vinyl alcohol) (FePVA) and dichromated poly(acrylic acid) (DCPAA), with and without an electron donor (dimethyl formamide), and xanthene dyes (fluorescein, eosin Y and Rose Bengal). Different parameters influencing the holographic performance have been optimized to achieve a high real-time diffraction efficiency (～70%). An electron transfer process from the polymer matrix to Cr(VI)/Fe(III), leading to the photocrosslinking of the polymer in the form of an interference pattern, has been suggested as the mechanism of information storage (hologram recording) in these materials.