多层印制板叠层设计对信号完整性的影响研究

基于优化多层印制板叠层设计改进信号完整性的目的,提出了通过叠层设计中调整印制板各层导线宽度、基板厚度、填充层厚度和绝缘材料厚度4个参数值,以改变各层信号传输路径特性阻抗的方法,结合工程实例,通过在特性阻抗连续和阻抗不连续两种情况下仿真的对比试验,验证了叠层设计优化方法的有效性.     

10Gbit／sX4小型可插拔并行光收发模块的研制

研制了一款基于系统级封装技术的低成本、收发一体和可带电热插拔的4通道小型可插拔（QSFP）光模块,采用850nm垂直腔面发射激光器（VCSEL）阵列及其驱动器作为发射端,光电探测器（PD）阵列及其跨阻放大器（TIA）作为接收端,通过光路无源对准,实现了低成本光互连。高速度、高密度封装下的瞬态同步开关噪声、芯片间电磁干扰...     

云安全研究进展综述

 随着云计算在学术界和工业界的兴起,云计算也不可避免的带来了一些安全问题.本文对云计算的安全需求进行了总结,指出云计算不仅在机密性、数据完整性、访问控制和身份认证等传统安全性上存在需求,而且在可信性、配置安全性、虚拟机安全性等方面具有新的安全需求.我们对云计算的两个典型产品Amazon Web Services和Windows Azure的安全状况进行了总结,并阐述了针对云计算的拒绝服务攻击和旁通道攻击.基于云计算的安全需求和面临的攻击,对现有安全机制进行了优缺点分析,系统的总结了现有的安全机制.     

Effect of plasma process-induced damage on bias temperature instability of MOSFETs

For a surface-channel n-MOSFET and a buried-channel p-MOSFET, the effect of plasma process-induced damage on bias temperature instability (BTI) was investigated. The gate oxide thickness, t_ox, of the test MOSFETs was 2.0, 3.0, or 4.5 nm. The shifts of threshold voltage V_th and of linear drain current I_dlin were measured after applying a BTI stress at a temperature of 125 °C. The measured shifts of V_th and I_dlin indicate that BTI on ultra-thin gate CMOS devices appears only in the form of SiO₂/Si interface degradation, and that the positive BTI for the n-MOSFET as well as the negative BTI for the p-MOSFET is important for the reliability evaluation of CMOS devices. Because of positive plasma charging to the gate, a protection diode was very efficient at reducing BTI for the p-MOSFET, but it was much less effective for the n-MOSFET.     

新颖的移动代理动态数据完整性保护协议

通过引入攻击者能力来对完整性的强弱进行划分和定义，在此基础上，分析了合谋情况下对动态数据进行截断攻击的问题，并给出了一个新颖的移动代理数据保护协议，该协议通过引入反向签名机制，形成一条从源节点到当前节点的信任链，实现对漫游路径的完整性保护，很好地解决了合谋情况下对动态数据的截断攻击，为自由漫游移动代理提供了更强的完整性保护。还使用形式化方法对协议的安全属性进行了分析验证。     

传输线中信号反射的研究

现代高速电路设计中的信号完整性问题,尤其是过度的反射现象,常常造成严重的电路问题。研究了反射形成的机理,即阻抗突变引发信号反射,通过分析给出了减少反射的措施。由Altium Designer的信号完整性分析工具对设想进行了验证,仿真结果表明:适当的端接能大幅度改善传输线中信号的反射。     

高速差分过孔的仿真分析

高速差分信号传输中也存在着信号完整性问题。差分过孔在频率很高的时候会明显地影响差分信号的完整性,现介绍差分过孔的等效RLC模型,在HFSS中建立了差分过孔仿真模型并分析了过孔尤其过孔长度对信号完整性的影响。     

高速PCB串扰分析及其最小化

技术进步带来设计的挑战,在高速、高密度PCB设计中,串扰问题日益突出。本文就串扰原理和对信号完整性影响进行分析,并在此基础上提出了高速PCB设计中串扰最小化的方法。     

The effect of solder paste residues on RF signal integrity

Wireless devices such as pagers and cellular phones are becoming common consumer items. These products require low loss RF signal propagation which is affected by material choices and processing conditions. This paper examines the effect of a series of no-clean solder pastes on signal integrity using an RF test circuit which sends a broadband signal through a gallium arsenide antenna switch and measures its transmission using a network analyzer. The test circuit also measures signal leakage. This paper reports on two different test vehicles, one that uses a 900 MHz antenna switch, and the other that uses a 2.0 GHz antenna switch. The transmission and leakage readings were taken daily for 16–21 days while the test vehicles were under accelerated aging conditions of 85°C and 85% RH. Average values for the readings for each solder paste were plotted to provide comparison among the pastes. The comparison data clearly distinguish solder pastes that provide consistency throughout the test period from those which do not.     

EMC技术在DSP控制系统中的应用

本文深入细致地分析了DSP控制系统的信号完整性问题,从PCB设计和软件设计两方面,提出电磁兼容性设计的方案。在教学过程中增加该实例的讲解,使得抽象的电磁兼容理论具体化。这样,学生的知识面得到扩展,对电磁兼容理论的理解会更加透彻,电磁兼容性设计的能力也会相应提高。