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61.
介绍采用混合贴装倒扣二极管技术制造的新型24GHz平衡混频器,并对该混频器进行设计、仿真、加工和测试,它能提供中频100kMz时小于10dB的变频损耗,本振与信号之间优于35dB的隔离度,其结构特点利于大批量、低成本生产,适合汽车电子系统的需求。 相似文献
62.
Advanced integrated circuit packaging processes require good bondability and reliability between various mating surfaces.
A key factor affecting this requirement is surface cleanliness. Plasma cleaning is the most suitable process for optimum surface
cleanliness. An investigation of O2, Ar, and O2/SF6 plasma cleaning was carried out on a flexible substrate to study the adhesion of anisotropic conductive adhesive film for
flip chip bonding. Surface roughness was found to increase substantially after the plasma treatment. Adhesion strength was
evaluated by 90° peeling tests both for untreated and plasma-treated flex. A higher adhesion strength of anisotropic conductive
film (ACF) bond was observed after plasma cleaning. The surface morphology of plasma treated and untreated flex substrate
before bonding, as well as the fracture surfaces after the peel test for both cases, was characterized by secondary electron
image techniques of scanning electron microscopy (SEM). Based on the detailed SEM findings, extensive comparisons were made
between the plasma treated and the untreated samples. Mechanical interlocking is found to be responsible for higher peel strength
of the plasma treated flex bonding. It was also proposed to select the right flexible substrate for highly reliable, ACF bonded
flip chip on flex substrate. 相似文献
63.
Ying-Chao Hsu Tung-Liang Shao Ching-Jung Yang Chih Chen 《Journal of Electronic Materials》2003,32(11):1222-1227
This paper investigates the electromigration-induced failures of SnAg3.8Cu0.7 flip-chip solder joints. An under-bump metallization
(UBM) of a Ti/Cr-Cu/Cu trilayer was deposited on the chip side, and a Cu/Ni(P)/Au pad was deposited on the BT board side.
Electromigration damages were observed in the bumps under a current density of 2×104 A/cm2 and 1×104 A/cm2 at 100°C and 150°C. The failures were found to be at the cathode/chip side, and the current crowding effect played an important
role in the failures. Copper atoms were found to move in the direction of the electron flow to form intermetallic compounds
(IMCs) at the interface of solder and pad metallization as a result of current stressing. 相似文献
64.
An infinite sequence of 0's and 1's evolves by flipping each 1 to a 0 exponentially at rate 1. When a 1 flips, all bits to its right also flip. Starting from any configuration with finitely many 1's to the left of the origin, we show that the leftmost 1 moves right with bounded speed. Upper and lower bounds are given on the speed. A consequence is that a lower bound for the run time of the random‐edge simplex algorithm on a Klee–Minty cube is improved so as to be quadratic, in agreement with the upper bound. © 2006 Wiley Periodicals, Inc. Random Struct. Alg., 2007 相似文献
65.
Joong-Do Kim 《Journal of Electronic Materials》2007,36(7):775-782
Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image
sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness
and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures
the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless
Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching,
and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods.
The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed,
assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the
cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using
Cu patterned wafers for high mega pixel applications. 相似文献
66.
Chun-Mei Li Ping Yang De-Ming Liu Ngar-Chun Hung Ming Li 《Journal of Electronic Materials》2007,36(5):587-592
Microstructures and microtextures of the gold wire, free air ball, Au stud bumps and flip chip bonding bumps were analyzed
using Electron Backscatter Diffraction (EBSD). It is demonstrated that process parameters, such as bonding power, force and
temperature have significant influences on the microstructure and microtexture of gold bumps. The non-uniform deformation,
the associated microstructure defects and the local textures of the Au bumps under the vertical force and the horizontal ultrasonic
wave applied are presented and discussed. 相似文献
67.
C. M. Tsai Y. L. Lin J. Y. Tsai Yi-Shao Lai C. R. Kao 《Journal of Electronic Materials》2006,35(5):1005-1009
A new electromigration failure mechanism in flip-chip solder joints is reported. The solder joints failed by local melting
of a PbSn eutectic solder. Local melting occurred due to a sequence of events induced by the microstructure changes in the
flip-chip solder joint. The formation of a depression in the current-crowding region of a solder joint induced the local electrical
resistance to increase. The rising local resistance resulted in a larger Joule heating, which, in turn, raised the local temperature.
When the local temperature rose above the eutectic temperature of the PbSn solder, the solder joint melted and consequently
failed. The results of this study suggest that a dynamic, coupled simulation that takes into account the microstructure evolution,
current density distribution, and temperature distribution may be needed to fully solve this problem. 相似文献
68.
69.
研究了以氮化铝为基板的倒扣封装的工艺。详细比较了氮化铝的各种金属化工艺。分别研究化学镀与激光诱导淀积实现金属化的方法。测量表明两种方法制备的金属层与氮化铝的粘附力均大于 10 MPa。同时对这两种方法的特点与适用范围进行概述 相似文献
70.
高密度封装技术的发展 总被引:14,自引:0,他引:14
摘要:重点介绍了BGA与CSP高密度封装技术的发展现状及趋势。BGA与CSP是现代组装技术的两个新概念,它们的出现促进了表面贴装技术(SMT)与表面贴装元器件(SMD)的发展和革新,并将成为高密度、高性能、多功能及高I/O数封装的最佳选择。 相似文献