“高频电子线路”理论课内嵌实验的探讨

国内大学的工程实践性课程通常理论课和实验课分开讲授，时间跨度大，内容不匹配，难以达到互相推动、互相促进的理想效果。在理论课讲授过程中同步内嵌实验课是一种无需变动复杂的课程体系，而能显著改善教学效果的方法。本文以“高频电子线路”课程的教学实践为例，探讨了此类改革面临的挑战和应对方法。     

Self-reconfiguration of real-time communication in cyber-physical systems

Today, in domains like automation and robotics systems consist of various sensors and computation nodes. Due to the temporal dependency in quality of measured data, such Cyber-Physical Systems (CPS) commonly have real-time requirements on communication. In addition, these systems shall become more flexible and scalable, e.g., by adding new components to the CPS. This would be most suitable if a CPS could react to the presence of a new component and reconfigure itself to run afterward with the new component integrated to the CPS. This capability is covered by the term Plug-and-Produce. In this paper, we propose a concept to enable Plug-and-Produce within a CPS whose network uses different communication media, e.g., Ethernet and CAN. To enable real-time communication provided by different communication protocols, their different synchronization mechanisms have to be combined to get a common time base within the entire system. For this purpose, we consider Ethernet as well as CAN-based real-time communication protocols and their synchronization mechanisms. The proposed concept for self-reconfiguration aims to be integrated into our three layered software architecture that is presented as well.     

Optimum design of a wideband planar N-way fork power divider with arbitrary power division and input-to-output impedance matching

An effective design procedure based on method of least squares is proposed for multi-section and multi-output fork power divider/combiner with arbitrary power division ratios among its outputs in a specified frequency bandwidth together with impedance matching among its arbitrary source/load impedances. Transmission and scattering matrices are obtained for its equivalent circuit. An error function is constructed based on design specifications on its output power division ratios, isolations among output ports, return losses at its input and output ports and source/load impedances in a desired frequency bandwidth. The design procedure is fully developed, which determines the widths and lengths of microstrip line sections and resistor values. A design example is described for unequal power division ratio and unequal input/output impedances. A 3-section and 3-output fork power divider is designed for equal power division and load/source impedances for 2–12 GHz band. It is fabricated and measured. Variations of its transmission coefficients are less than 0.5 dB, isolations at its outputs are better than −15 dB and reflection coefficients at its ports are better than −10 dB. Excellent agreement is observed among the results of the proposed design procedure, full wave computer software and measurement data.     

Combining GPS carrier phase and Doppler observations for precise velocity determination

The truncation error and propagation error are analyzed for velocity determination through differential GPS carrier phase observations,and an approach for the choice of the best number of points for the central difference method is developed.In order to overcome the disadvantages of existing GPS velocity determination methods,a new velocity determination algorithm is presented,based on combining carrier phase and Doppler observations.The basic idea is that two types of observation are combined by adding the...     

iCETD: An improved tag generation design for memory data authentication in embedded processor systems

Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design.     

半导体技术对无源电子元件发展的影响

经过半个世纪的发展,半导体技术不仅在制造功能强大的IC及各式各样的半导体分立器件方面,对社会发展起到不可估量的推动作用,而且对其他技术领域也产生了深刻的影响。在当前世界经济衰退浪潮的冲击下,无源电子元件领域借鉴、融合半导体技术以提高自身创新能力,加快产品升级是抵御冲击的值得关注的措施之一。     

基于跨度和虚拟层的三维芯核测试外壳扫描链优化方法

为减少三维芯核绑定前和绑定后的测试时间,降低测试成本,提出了基于跨度和虚拟层的三维芯核测试外壳扫描链优化方法.所提方法首先通过最大化每条测试外壳扫描链的跨度,使得绑定前高层电路和低层电路的测试外壳扫描链数量尽可能相等.然后,在TSVs(Through Silicon Vias)数量的约束下,逐层的将虚拟层中的扫描元素分配到测试外壳扫描链中,以平衡绑定前后各条测试外壳扫描链的长度.实验结果表明,所提方法有效地减少了三维芯核绑定前后测试的总时间和硬件开销.     

对嵌入式软件开发原则与模式研究

伴随着持续发展的科学技术水平,人们更高要求软件,针对当前逐步增长的产品研发要求,以往传统软件开发方式难以满足,在此背景下,亟待开发出适应现代生活的嵌入式软件,更多的人将其目光放在开发嵌入式软件方法,以便可以将开发软件效率提升,确保开发质量,开发嵌入式软件,必须将其出发点放在客观实际,将已开发当成中心,着力需求嵌入式软件开发原则与模式。     

电路板嵌入元器件有机模块技术的开发

为了提高电子组装密度,基板嵌入元器件的三维安装模式受到人们更多的关注.介绍了一种以铜芯为基板核心材料的元器件嵌入技术(EOMIN),详细叙述了其外形结构和制造工艺,并通过实验与FR-4基板嵌入元器件和低温共烧陶瓷基板(LTCC)安装元器件进行比较,通过实验数据对比得出EOMIN元器件嵌入技术具有导热性能好,抗疲劳性强,承受热冲击时铜的塑性变形量小,连接可靠性高等优良特性的结论.