基于物联网的新型视频监控系统的设计与实现

为了实现包括服务端和客户端的一套简单、稳定、可靠的新型视频监控系统。首先分析了视频监控系统的发展历史和趋势,提出基于移动互联网的视频监控系统方案,并选定Android作为系统实现的平台;明确了需求和目标,设计出系统的整体方案,并搭建了系统的程序框架;再根据系统程序框架的设计,详细地设计并实现了各个子功能模块,其中主要的功能模块有视频采集与视频回显模块,视频预处理模块,视频编解码模块和视频存储模块等;最后,对整个系统进行了综合测试,验证了其功能的完整性,得出系统的性能表现数据。经实验证明,所设计系统使用便利,需求中指定的功能也基本实现,程序的运行稳定高效可靠,能达到预期效果,具有一定的实用性和研究意义。     

基于现场总线的高隔离度可调直流电源嵌入式控制器设计

模块级联是用于绝缘实验所需的高性能对称双极型矩形波脉冲电源的一种方法,为实现级联,需要有能够协调工作的高隔离度直流电源。设计出嵌入到各电源的板级嵌入式控制器BEC,使各BEC作为从节点利用RS485接口和ModBus协议与嵌入式主控制器EHC构成一个主从式现场总线网络,并在主节点EHC的控制下协调工作。利用BEC内的STM32F103C8处理器产生隔离DC-DC桥的互补PWM控制信号和高隔离输出电压,并进行电流和输出电压的隔离检测。由基于电流切换的变参数增量式数字PI算法来确定脉冲宽度值,产生Buck调压电路的闭环PWM控制信号,实现输出电压的调压和稳压控制。实验结果表明该嵌入式控制器能够满足级联式对称双极型矩形波脉冲电源对高隔离度可调直流电源的需要。     

Effect of gate engineering in JLSRG MOSFET to suppress SCEs: An analytical study

In this work, an analytical model of gate-engineered junctionless surrounding gate MOSFET (JLSRG) has been proposed to uncover its potential benefit to suppress short-channel effects (SCEs). Analytical modelling of centre potential for gate-engineered JLSRG devices has been developed using parabolic approximation method. From the developed centre potential, the parameters like threshold voltage, surface potential, Electric Field, Drain-induced Barrier Lowering (DIBL) and subthershold swing are determined. A nice agreement between the results obtained from the model and TCAD simulation demonstrates the validity and correctness of the model. A comparative study of the efficacy to suppress SCEs for Dual-Material (DM) and Single-Material (SM) junctionless surrounding gate MOSFET of the same dimensions has also been carried out. Result indicates that TM-JLSRG devices offer a noticeable enhancement in the efficacy to suppress SCEs by as compared to SM-JLSRG and DM-JLSRG device structures. The effect of different length ratios of three channel regions related to three different gate materials of TM-JLSRG structure on the SCEs have also been discussed. As a result, we demonstrate that TM-JLSRG device can be considered as a competitive contender to the deep-submicron mainstream MOSFETs for low-power VLSI applications.     

Intrinsic Flexibility of the Zeolitic Imidazolate Framework ZIF‐7 Unveiled by CO2 Adsorption and Hg Intrusion

ZIF‐7, built as an assembly of Zn^II centers and benzimidazolate ligands, shows prominent S‐shaped isotherms upon CO₂ adsorption that can be attributed to sorbate‐induced gate‐opening phenomena involving a narrow‐to‐large pore phase transition. This peculiar sorption pattern can be captured via the formulation of thermodynamic isotherms, providing a direct enthalpic and entropic view of the gate‐opening process. Relying on such an approach, an energy barrier with preferential enthalpic nature for CO₂ adsorption/desorption in the gate‐opening region could be unveiled. Moreover, the elastic energy involved during the gate‐opening process was revisited to 1.4–2.8 kJ mol^?1 of solid in the temperature range 273–323 K, matching the value measured by isostatic compression of a ZIF‐7_lp sample filled with DMF and showing a dominant entropic contribution.     

A Light‐up Logic Platform for Selective Recognition of Parallel G‐Quadruplex Structures via Disaggregation‐Induced Emission

The design of turn‐on dyes with optical signals sensitive to the formation of supramolecular structures provides fascinating and underexplored opportunities for G‐quadruplex (G4) DNA detection and characterization. Here, we show a new switching mechanism that relies on the recognition‐driven disaggregation (on‐signal) of an ultrabright coumarin‐quinazoline conjugate. The synthesized probe selectively lights‐up parallel G4 DNA structures via the disassembly of its supramolecular state, demonstrating outputs that are easily integrable into a label‐free molecular logic system. Finally, our molecule preferentially stains the G4‐rich nucleoli of cancer cells.     

Enzyme-free and DNA-based universal platform for the construction of various logic devices based on graphene oxide and G-quadruplex

In the fields of biocomputing and biomolecular, DNA molecules are applicable to be regarded as data of logical computing platform that uses elaborate logic gates to perform a variety of tasks. Graphene oxide (GO) is a type of novel nanomaterial, which brings new research focus to materials science and biosensors due to its special selectivity and excellent quenching ability. G-quadruplex as a unique DNA structure stimulates the intelligent application of DNA assembly on the strength of its exceptional binding activity. In this paper, we report a universal logic device assisted with GO and G-quadruplex under an enzyme-free condition. Integrated with the quenching ability of GO to the TAMRA (fluorophore, Carboxytetramethylrhodamine) and the enhancement of fluorescence intensity produced by the peculiar binding of G-quadruplex to the NMM (N-methylmesoporphyrin IX), a series of basic binary logic gates (AND. OR. INHIBIT. XOR) have been designed and verified through biological experiments. Given the modularity and programmability of this strategy, two advanced logic gates (half adder and half subtractor) were realized on the basis of the same work platform. The fluorescence signals generated from different input combinations possessed satisfactory results, which provided proof of feasibility. We believe that the proposed universal logical platform that operates at the nanoscale is expected to be utilized for future applications in molecular computing as well as disease diagnosis.     

基于ARM9的嵌入式WEB服务器的研究与设计

详细分析了嵌入式Web服务器在网络应用方面的前景,深入研究了嵌入式Web服务器的原理,并给出了基于ARM9的嵌入式Web服务器的设计方法及关键技术的实现。     

基于SiP技术的胶囊内窥镜微型电路系统制造

胶囊内窥镜是近年发展起来的微型医疗仪器,其电路构造具有体积小、功能全等特点。文章提出用高密度封装SiP技术实现胶囊内窥镜的电路系统微型化。相对传统的芯片定制方式,采用堆叠式、表面贴装式或倒装焊式等组装方式具有成本低、难度低、开发周期短的优点。SiP封装、埋植式元件基板制造等高密度封装技术的不断发展,使得采用普通商用芯片实现胶囊内窥镜电路系统制造具有可行性。     

基于FPGA的4k点基-16FFT模块的实现

针对高速实时处理的要求,提出了4096点快速傅立叶变换(FFT)模块在现场可编程门阵列(FPGA)中的设计和实现。在运算模块中,基于按频率抽取基-4算法提出了一种新型的基-16蝶型算法,并采用八级流水结构和四路转换器来实现。本文采用块浮点和循环存储结构,避免了溢出和节省了大量的硬件资源。实验结果表明,该方法在保证了运算精度和实现复杂度的同时,使运算速度相对于基-4算法提高了1倍。     

基于0.5 μm CMOS集成电路高低压兼容技术研究

将高压MOSFETs器件集成到低压CMOS数字和模拟电路中的应用越来越频繁。文章参考了Parpia提出结构,将高压NMOS、PMOS器件制作在商用3.3V/5V 0.5μmN-阱CMOS工艺中,没有增加任何工艺步骤,也没有较复杂BiCMOS工艺中用到的P-阱、P+、N+埋层,使用了PT注入。通过对设计结构的PCM测试,可以得到高压大电流的NMOS管BVdssn>23V～25V,P管击穿BVdssp>19V。同时,文章也提供了高压器件的设计思路和结果描述。