The role of electric current in the formation of white-etching-cracks

ABSTRACT

Material failure by white-etching-cracks (WECs) can cause enormous economic costs. The formation of WECs emerges from the decomposition of the original, usually cementite-containing, microstructure. As small amounts of electric current can trigger this failure mechanism, we investigate the contribution of electric current to cementite decomposition. We applied ～700 A/cm² for two weeks at 60°C to a pearlitic Fe-0.74C (wt%) specimen. The comparison of the microstructure before and after showed no differences. Theoretical considerations support the conclusion that at this low temperature such electric current densities cannot directly cause cementite decomposition. Electric current could play an indirect role in the formation of WECs, however, by generating hydrogen from the lubricant which is known to accelerate WECs formation.     

An appraisal of experimental designs: Application to enantioselective capillary electromigration techniques

Enantioresolution processes are vital tools for investigating the enantioselectivities of chiral compounds. An analyst resolves to optimize enantioresolution conditions once they are determined. Generally, optimization is conducted by a one-factor-at-a-time (OFAT) approach. Although this approach may determine an adequate condition for the method, it does not often allow the estimation of the real optimum condition. Experimental designs are conducive for the optimization of enantioresolution methods via capillary electromigration techniques (CETs). They can efficiently extract information from the behavior of a method and enable the estimation of the real optimum condition. Furthermore, the application of the analytical quality by design (AQbD) approach to the development of CET-based enantioselective methods is a trend. This article (i) offers an overview of the application of experimental designs to the development of enantioselective methods from 2015 to mid-2020, (ii) reveals the experimental designs that are presently employed in CET-based enantioresolutions, and (iii) offers a critical point of view on how the different experimental designs can aid the optimization of enantioresolution processes by considering the method parameters.     

VLSI金属互连线电迁移噪声检测敏感性的逾渗模拟

在电迁移物理机制的基础上结合逾渗理论,建立了一种金属互连线电迁移的逾渗模型。基于该模型,采用蒙特卡罗方法模拟了超大规模集成电路（VLSI）金属互连线电迁移过程中电阻和低频噪声参数的变化规律。结果表明,与传统的电阻测量方法相比,低频噪声表征方法对电迁移损伤更敏感,检测的效率更高。该研究结果为低频噪声表征VLSI金属互连线电迁移损伤的检测方法提供了理论依据。     

Electromigration-induced cracks in Cu/Sn3.5Ag/Cu solder reaction couple at room temperature

Electromigration (EM) behavior of Cu/Sn3.5Ag/Cu solder reaction couple was investigated with a high current density of 5× 103 A/cm2 at room temperature. One dimensional structure, copper wire/solder ball/copper wire SRC was designed and fabricated to dissipate the Joule heating induced by the current flow. In addition, thermomigration effect was excluded due to the symmetrical structure of the SRC. The experimental results in-dicated that micro-cracks initially appeared near the cathode interface between solder matrix and copper substrate after 474 h current stressing. With current stressing time increased, the cracks propagated and extended along the cathode interface. It should be noted that the continuous Cu6Sn5 intcrmetallic compounds (LMCs) layer both at the anode and at the cathode remained their sizes. Interestingly, tiny cracks appeared at the root of some long column-type Cu6Sn5 at the cathode interface due to the thermal stress.     

Electromigration Behavior in Sn-37Pb and Sn-3.0Ag-0.5Cu Flip-Chip Solder Joints under High Current Density

The electromigration of conventional Sn-37Pb and Pb-free Sn-3.0Ag-0.5Cu (in wt.%) solder bumps was investigated with a high current density of 2.5 × 10⁴ A/cm² at 423 K using flip-chip specimens comprised of an upper Si chip and a lower bismaleimide triazine (BT) substrate. Electromigration failure of the Sn-37Pb and Sn-3.0Ag-0.5Cu solder bumps occurred with complete consumption of electroless Ni immersion Au (ENIG) underbump metallization (UBM) and void formation at the cathode side of the solder bump. Finite element analysis and computational simulations indicated high current crowding of electrons in the patterned Cu on the Si chip side, whereas the solder bumps and Cu line of the BT substrate had a relatively low density of flowing electrons. These findings were confirmed by the experimental results. The electromigration reliability of the Sn-3.0Ag-0.5Cu solder joint was superior to that of Sn-37Pb.     

纳米压痕技术控制电迁移现象中铝原子积聚位置研究

在利用电迁移现象制备铝纳米线的过程中,铝纳米线的生长位置取决于铝原子的积聚位置。为实现铝原子积聚位置控制,基于纳米压痕技术改变试样中铝膜的横截面结构,制备了铝膜试样。通过输入并调节直流电大小使铝膜内产生电迁移现象。试验结果表明,纳米压痕技术可有效提高局部区域的电流密度,显著增强铝原子的电迁移强度,并在压痕区域出现铝原子积聚现象。     

Electromigration in integrated circuits

We review the mechanism of integrated circuit failure known as “electromigration.” Electromigration is a physical wearout process that operates primarily in the on-chip interconnections of an integrated circuit. It is caused by the currents that run through those interconnections. The first part of the review introduces the founding principles of electromigration and the research history upon which those principles are based. The second part introduces and reviews the increasingly relevant issue of pulsed current electromigration, and the final part contains a relatively detailed review of a recent study of pulsed current electromigration.     

Electric current effects upon the Sn/Cu and Sn/Ni interfacial reactions

Electromigration-induced failures in integrated circuits have been intensively studied recently; however, electromigration effects upon interfacial reactions have not been addressed. These electromigration effects in the Sn/Cu and Sn/Ni systems were investigated in this study by analyzing their reaction couples annealed at 200°C with and without the passage of electric current. The intermetallics formed were ε-(Cu₃Sn) and η-(Cu₆Sn₅) phases in the Sn/Cu couples and Ni₃Sn₄ phase in the Sn/Ni couples. The same intermetallics were formed in the two types of couples with and without the passage of electric current. The thickness of the reaction layers was about the same in the two types of couples of the Sn/Cu system. In the Sn/Ni system, the growth of the intermetallic compound was enhanced when the flow direction of electrons and that of diffusion of Sn were the same. But the effect became inhibiting if the directions of these two were opposite. Theoretical calculation indicated that in the Sn/Ni system, the electromigration effect was significant and was 28% of the chemical potential effect for the Sn element flux when the Ni₃Sn₄ layer was 10 μm thick. For the Sn and Cu fluxes in the Sn/Cu reaction couples, similar calculations showed that the electromigration effects were only 2 and 4% of the chemical potential effects, respectively. These calculated results were in good agreement with the experimental observations that in the Sn/Cu system the electric current effects were insignificant upon the interfacial reactions.     

Electromigration studies on Sn(Cu) alloy lines

The Cu alloying effect in the Sn(Cu) solder line has been studied. The Sn0.7Cu solder line has the most serious electromigration (EM) damage compared to pure Sn and Sn3.0Cu solder lines. The dominant factor for the fast EM rate in Sn0.7Cu could be attributed to the relatively small grain size and the low critical stress, i.e., the yielding stress of the Sn0.7Cu solder line. Also, we found that the shortest Sn0.7Cu solder line, 250 μm, has the most serious EM damage among three solder lines of different lengths. The back stress induced by EM might not play a significant role on the EM test of long solder lines. A new failure mode of EM test was observed; EM under an external tensile stress. The external stress is superimposed on the stress profile induced by EM. As a result, the hillock formation was retarded at the anode side, and void formation was enhanced at the cathode.     

Sn0.7Cu无铅焊点的电迁移失效模拟及优化分析

基于ANSYS有限元软件,综合考虑电子风力、温度梯度、应力梯度和原子密度梯度四种电迁移驱动机制,采用原子密度积分法(ADI)对倒装芯片球栅阵列封装(FCBGA)的Sn0.7Cu无铅焊点进行电迁移失效模拟。针对焊点直径、焊点高度、焊点下金属层(UBM)厚度三个关键参数进行电迁移失效的正交试验优化,探究焊点尺寸对电迁移失效的影响。研究表明:焊点直径和高度的增加会缩短焊点的电迁移失效寿命(TTF),而UBM层厚度对焊点失效寿命的影响相对较小;焊点局部拉应力对焊点的失效寿命影响较大,通常会加剧焊点的空洞失效。