二硫化锡薄膜场效应晶体管的可见光探测特性

采用化学气相输运(CVT)法和微机械剥离技术制备了SnS₂薄膜,使用Au电极作为源、漏电极,n型重掺杂Si作为栅极,制备了基于SnS₂薄膜的背栅型场效应晶体管(FET),并研究了其电学特性和可见光探测特性。结果表明,制备的SnS₂薄膜具有良好的结晶度,SnS₂薄膜背栅型FET具备良好的栅压调控特性。器件对波长为405 nm的蓝紫光表现出明显的光响应,光响应度高达456.82 A·W^-1,外量子效率为1.40×10⁵%,比探测率为7.12×10¹²Jones,并且具有较快的光响应速度,上升和下降响应时间分别为1 ms和0.5 ms。器件的光探测性能受栅压调控,当栅压为40 V时,器件的光响应度可达730 A·W^-1。     

基于门控制的星载时间敏感网络调度算法

空间信息网络中时间敏感业务的实时性、确定性和可靠性要求对基于存储转发方式的传统以太网交换提出巨大挑战。提出一种基于门控制的星载时间敏感网络调度算法,设计星载时间敏感网络交换方案;针对卫星业务突发的特点,提出一种基于时分复用的门控制列表生成方法,对该调度算法在不同业务流量特征背景下的确定性时延及时延抖动性能进行仿真分析。仿真结果表明,所提算法的最小时延减小至10 μs量级,最小时延抖动为0,满足空间时间时敏业务的确定性传输要求,提高了空间信息网络业务传输的确定性、可靠性、灵活性。     

Designing efficient FPGA tiles for power-constrained ultra-low-power applications

High power consumption of Field-Programmable Gate Arrays (FPGAs) makes them a less attractive choice for ultra-low-power applications. Depending on the power source, ultra-low-power systems could either be constrained by power (energy harvesting systems) or by energy (battery-powered systems). In this work, we are evaluating four different FPGA tiles to find the one that is better suited for both power-constrained and energy-constrained systems. Ultra-low-power systems apply voltage downscaling to reduce the power consumption. However, the operational limits of different blocks do not allow conventional FPGA to be operated at very low voltage. Therefore, their logic capacity can only be increased by 2–4 times by applying voltage downscaling. In this work, we identified the blocks in FPGA tiles that are vulnerable at low voltage and replace them with alternate circuits. The results indicate that, by slight modifications in the conventional FPGA tiles, logic capacity can be increased up to 8 times, whereas power-delay-product can be reduced up to 74%.     

A new design of QCA‐based nanoscale multiplexer and its usage in communications

Quantum‐dot cellular automata (QCA) is one of the proposed nanotechnologies in the electronics industry, which offers a new construction for scheming digital circuits with less energy consumption on the nanoscale and possibly can be an appropriate replacement of complementary metal‐oxide semiconductor (CMOS) technology. Nanocommunication in QCA has attracted a wide range of researcher's attention. However, there is still a broad scope to design QCA‐based architecture for nanocommunication. The multiplexer is hugely used in the telecommunication system and transmits multiple data at the same time. Therefore, in this paper, a useful structure to implement a 2 to 1 multiplexer based on the novel XOR gate is presented and is used as a module to implement the 4 to 1 and 8 to 1 multiplexers. Simulations using QCADesigner tool are done to check the performance of the suggested designs. The 2 to 1, 4 to 1, and 8 to 1 QCA multiplexer structures utilize 22, 92, and 260 cells and consume 0.03, 0.12, and 0.40 μm² of area, respectively. They have shown that the suggested designs have stable and applicable structures regarding area, cost, and complexity.     

A Semi‐Floating Memory with 535% Enhancement of Refresh Time by Local Field Modulation

The recently proposed semi‐floating gate memory technology shows the potential to balance conflicts between writing speed and data storage. Although the introduction of the p–n junction greatly improves device writing speed, the inevitable junction leakage limits the further extension of data retention time. A local nonvolatile electric field is introduced by exploiting the polarization of ferroelectric gate dielectric HfZrO₄ to modulate the charge leakage speed of the p–n junction since the carrier density of 2D materials can be efficiently regulated. The refresh time is greatly prolonged more than 535%, solving the bottleneck problem of relatively short retention time of previous semi‐floating gate memory. In addition, the characteristics of device under low operation voltage is also explored, which can serve for further power reducing. This design realizes the combination of ultrafast writing operation and significant enhanced data retention ability, which provides a new idea of the development for high speed non‐volatile memory technology.     

Mechanoplastic Tribotronic Floating‐Gate Neuromorphic Transistor

The emulation of synaptic plasticity to achieve sophisticated cognitive functions and adaptive behaviors is critical to the evolution of neuromorphic computation and artificial intelligence. More feasible plastic strategies (e.g., mechanoplasticity) are urgent to achieve comparable, versatile, and active cognitive complexity in neuromorphic systems. Here, a versatile mechanoplastic artificial synapse based on tribotronic floating‐gate MoS₂ synaptic transistors is proposed. Mechanical displacement can induce triboelectric potential coupling to the floating‐gate synaptic transistor, trigger a postsynaptic current signal, and modulate the synaptic weights, which realizes the synaptic mechanoplasticity in an active and interactive way. Typical synaptic plasticity behaviors including potentiation/inhibition and paired pulse facilitation/depression are successfully imitated. Assistant with the charge trapping by floating gate, the artificial synapse can realize mechanical displacement derived short‐term and long‐term plasticity simultaneously. A facile artificial neural network is also constructed to demonstrate an adding synaptic weight and neuromorphic logic switching (AND, OR) by mechanoplasticity without building complex complementary metal oxide semiconductor circuits. The proposed mechanoplastic artificial synapse offers a favorable candidate for the construction of mechanical behavior derived neuromorphic devices to overcome the von Neumann bottleneck and perform advanced synaptic behaviors.     

Inhibit化学逻辑门: 基于Al3＋和Fe3＋的β-二酮荧光开关的研究

合成了1,3-二苯基-4-苯乙酰-5-吡唑酮(HDPP-PA)与Al^3＋, Fe^3＋形成的配合物, 通过元素分析、质谱、红外光谱、紫外-可见吸收、荧光光谱等测试方法, 对其组成和结构进行了表征, 发现Fe^3＋能有效地减弱Al配合物的荧光, 为此将HDPP-PA与Al^3＋和Fe^3＋组成一个具有INHIBIT操作功能的化学逻辑门.     

Reprint of : Scattering approach to scanning gate microscopy

We present a perturbative approach to the conductance change caused by a weakly invasive scattering potential in a two-dimensional electron gas. The resulting expressions are used to investigate the relationship between the conductance change measured in scanning gate microscopy as a function of the position of a scattering tip and local electronic quantities like the current density. We use a semiclassical approach to treat the case of a strong hard-wall scatterer in a half-plane facing a reflectionless channel. The resulting conductance change is consistent with the numerically calculated quantum conductance.     

Molecular logic circuits and a security keypad lock based on a novel colorimetric azo receptor with dual detection ability for copper(II) and fluoride ions

A novel azoimine dye-based colorimetric chemosensor (1) has been designed and synthesised for dual recognition of copper(II) and fluoride ions in aqueous media. Significantly, the outstanding dual-ion recognition properties along with the excellent reversibility prompted us to consider 1 as an ideal candidate for fabrication of multiple logic circuits. According to the response profile of 1 towards Cu²⁺ and F^? inputs, we developed a unique tunable system integrated with one INHIBIT logic gate as well as one OR gate. Also, 1 behaved as a molecular keypad lock with sequential addition of Cu²⁺ and F^? inputs. In accession, a reversible ‘Write–Read–Erase–Read’ function with complementary ‘IMP/INH’ logic gate has been demonstrated through a feedback loop using F^? and trifluoroacetic acid as two chemical inputs. To the best of our knowledge, this is the first report where the symmetrical bis azo-azomethine dye has been exploited as a molecular keypad lock.     

二次耦合直流输出的金属氧化物TFT行驱动电路

为了弥补现有氧化物TFT的行驱动电路输出模块在功率消耗、响应速度、输出摆幅等方面的不足,提出了基于二次耦合的直流输出模块,并由此研究设计新的行驱动电路拓扑。仿真结果表明,该输出模块具有驱动能力强、响应速度快等优点。最后,基于刻蚀阻挡层(ESL)结构的氧化物TFT工艺,在玻璃衬底上成功制备了该行驱动电路,实测单级功耗为325μW。