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41.
C. Usha  P. Vimala 《半导体学报》2019,40(12):122901-122901-7
This paper presents a compact two-dimensional analytical device model of surface potential, in addition to electric field of triple-material double-gate (TMDG) tunnel FET. The TMDG TFET device model is developed using a parabolic approximation method in the channel depletion space and a boundary state of affairs across the drain and source. The TMDG TFET device is used to analyze the electrical performance of the TMDG structure in terms of changes in potential voltage, lateral and vertical electric field. Because the TMDG TFET has a simple compact structure, the surface potential is computationally efficient and, therefore, may be utilized to analyze and characterize the gate-controlled devices. Furthermore, using Kane's model, the current across the drain can be modeled. The graph results achieved from this device model are close to the data collected from the technology computer aided design (TCAD) simulation.  相似文献   
42.
S. Derrouiche  B. Bouazza  C. Sayah 《半导体学报》2018,39(11):114002-114002-5
We present the drain current modulation for an HEMT using the TCAD SILVACO simulation tool with a drift–diffusion model at ambient temperature. The obtained results show that the decreases of substrate energies induce the decreasing of the obtained drain current similarly to the transconductance, which described the device due to increasing the transferred electrons concentration towards the substrate region, consequently to increase the molar fraction where the concentration of transferred electrons increases from 49 × 1019 to 65 × 1019 cm−3 when the molar fraction increases from 0.1 to 0.9. On the other hand, the decrease of molar fraction from 0.9 to 0.1 induces the increasing of drain current by 63%, where it increases from 1.1 mA/mm to 3 mA/mm at Vgs = 0.6 V and Vds = 1 V. This fact leads to ensuring the possibility of using the obtained results of this work related to drain current for producing performances devices that brings together the AC characteristics of HEMT with a weak drain current, which is important in the bioengineering domain.  相似文献   
43.
Two-dimensional DC and small-signal analysis of gate-to-source scaling effects in SiC-based high-power field-effect transistors have been performed in this paper. The simulation results show that a downscaling of gate-to-source distance can improve device performance, i.e. enhancing drain current, transconductance, and maximum oscillation frequency. This is associated with the peculiar dynamic of electrons in SiC MESFETs, which lead to a linear velocity regime in the source access region. The variations of gate-to-source capacitance, gate-to-drain capacitance, and cut-off frequency with respect to the change in gate-to-source length have also been studied in detail.  相似文献   
44.
The spacer technique is proposed for the fabrication of the Asymmetric Schottky Barrier MOSFETs (ASB-MOSFET). The characteristics of the 45 nm and the 20 nm n-channel ASB-MOSFETs, which adopt a Schottky barrier height of 0.9 eV at source and that of 0.2 eV at drain, have been simulated and discussed by the comparisons with the conventional Schottky Barrier MOSFETs (SB-MOSFET). With a higher Ion/Ioff ratio, the ASB-MOSFET structure has shown a better performance than the conventional SB-MOSFETs.  相似文献   
45.
纳米级金属氧化物半导体场效应晶体管(MOSFET)精确的高频噪声模型是毫米波集成电路低功耗设计的重要基础,而现有的高频漏极噪声模型不仅没有融合器件的衬底效应和栅电阻效应,也没有充分考虑器件的频率和偏置依赖性。针对上述问题,基于纳米MOSFET器件的物理特性,并结合漂移扩散方程和有效栅极过载,建立统一表征强反区到弱反区的频率和偏置依赖性的漏极噪声模型,使之便于移植到先进设计系统(ADS)仿真设计。通过所建模型的仿真结果与实验测试结果进行比较,验证所建模型的准确性。同时比较所建模型对130 nm和40 nm MOSFET两种不同工艺器件的实用性,验证其对表征40 nm MOSFET的毫米波噪声特性的优越性。  相似文献   
46.
用于亚微米CMOS的轻掺杂漏工艺   总被引:1,自引:0,他引:1  
本文研究了轻掺杂漏工艺对器件特性的影响。优化了轻掺杂区离子注入的剂量和能量。优化的SiO2侧墙LDD工艺有效地抑制了短沟道效应。研制成功了沟道长度为0.5μm的CMOS27级环振电路,门延迟为170ns.  相似文献   
47.
Using measured capacitance-voltage curves and current-voltage characteristics for the AlGaN/AlN/GaN heterostructure field-effect transistors with different gate lengths and drain-to-source distances,the influence of drain bias on the electron mobility is investigated.It is found that below the knee voltage the longitudinal optical(LO) phonon scattering and interface roughness scattering are dominant for the sample with a large ratio of gate length to drain-to-source distance(here 4/5),and the polarization Coulomb field scattering is dominant for the sample with a small ratio(here 1/5).However,the above polarization Coulomb field scattering is weakened in the sample with a small drain-to-source distance(here 20 μm) compared with the one with a large distance(here 100 μm).This is due to the induced strain in the AlGaN layer caused by the drain bias.  相似文献   
48.
介绍了市内电话电(光)缆在不同敷设方式下的防雷处理方法和标准要求,对雷电等高压侵入的保护,以确保人身、设备安全,不断提高通信质量。  相似文献   
49.
In this paper, we present the combination of drain field plate(FP) and Schottky drain to improve the reverse blocking capability, and investigate the reverse blocking enhancement of drain FP in Schottky-drain AlGaN/GaN high-electron mobility transistors(HEMTs). Drain FP and gate FP were employed in a two-dimensional simulation to improve the reverse blocking voltage(VRB) and the forward blocking voltage(VFB). The drain-FP length, the gate-FP length and the passivation layer thickness were optimized. VRBand VFBwere improved from-67 V and 134 V to-653 V and 868 V respectively after optimization. Simulation results suggest that the combination of drain FP and Schottky drain can enhance the reverse blocking capability significantly.  相似文献   
50.
A new modified Angelov current–voltage characteristic model equation is proposed to improve the drain–source current(Ids) simulation of an Al Ga N/Ga N-based(gallium nitride) high electron mobility transistor(Al Ga N/Ga N-based HEMT) at high power operation. Since an accurate radio frequency(RF) current simulation is critical for a correct power simulation of the device, in this paper we propose a method of Al Ga N/Ga N high electron mobility transistor(HEMT)nonlinear large-signal model extraction with a supplemental modeling of RF drain–source current as a function of RF input power. The improved results of simulated output power, gain, and power added efficiency(PAE) at class-AB quiescent bias of Vgs =-3.5 V, Vds= 30 V with a frequency of 9.6 GHz are presented.  相似文献   
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