Deterministic Fabrication of Twisted Van Der Waals Structures

In 2D van der Waals (vdW) materials, rotational misalignment by a twist angle between adjacent layers can significantly affect their properties, referred as twistronics. Accurate tuning of twist angle of vdW materials in a controllable and efficient way is highly required. Here a thin-film assisted transfer (TAT) technique that can controllably fabricate vdW structures with deterministic twist angles (accuracy of 0.37°) is developed. The transparent and ultrathin film as transfer medium ensures the visible and intact manipulation of monolayer building blocks, thus constructing vdW architectures with multi-materials and designated position. Multilayer homo-/hetero-architectures in the geometry of series connection, spiral structure and chiral symmetry at deterministic twist angles are for the first time demonstrated. They can be located on various substrates for both structural analysis and device application. The capability of fabricating twisted homo-/hetero- vdW structures in a deterministic, high-throughput manner will serve as a powerful tool for twistronics.     

The boundary of iterates in Euclidean growth models

This paper defines a general Euclidean growth model via a translation invariant, monotone and local transformation on Borel subsets of . The main result gives a geometric condition for the boundary curvature of the iterates to go to 0. Consequences include estimates for the speed of convergence to the asymptotic shape, and a result about survival of Euclidean deterministic forest fires.

     

Deterministic and random fixed points for maps on extension type spaces

We present a variety of deterministic and random fixed point results for very general spaces and classes of maps.     

在去相环境中原子态的确定性隐形传态

为了减小噪声环境对量子隐形传态的影响,针对去相环境噪声,提出了一种基于免退纠缠态和量子错误避免代码技术的量子隐形传态抗噪方案。在该方案中,将免退纠缠态的四量子比特作为量子纠缠信道,被传输的量子信息编码到两个量子比特。结果表明,整个隐形传输过程不会受到去相环境噪声的影响,并且具有100%成功几率。该研究对量子通讯的发展是有帮助的。     

Active,Programmable Elastomeric Surfaces with Tunable Adhesion for Deterministic Assembly by Transfer Printing

Active, programmable control of interfacial adhesion is an important, desired feature of many existing and envisioned systems, including medical tapes, releasable joints, and stamps for transfer printing. Here a design for an elastomeric surface that offers switchable adhesion strength through a combination of peel‐rate dependent effects and actuation of sub‐surface fluid chambers is presented. Microchannels and open reservoirs positioned under a thin surface membrane can be pressurized in a controlled manner to induce various levels of surface deformation via inflation. These pressurized structures demonstrate utility in controllably decreasing the strength of adhesion of flat, solid objects to the elastomeric surface, particularly in the limit of low peel‐rates. Experimental and theoretical studies of these systems reveal the key mechanisms, and guide optimized geometries for broad control over adhesion, in a programmable and reversible manner. Implementing these concepts in stamps for transfer printing enables new modes for deterministic assembly of micro‐ and nanoscale materials onto diverse types of substrates. Collections of silicon plates delivered onto plastic, paper and other surfaces with single or multiply addressable stamps illustrate some of the capabilities.     

DTN routing for quasi‐deterministic networks with application to LEO constellations

We propose a novel DTN routing algorithm, called DQN, specifically designed for quasi‐deterministic networks with an application to satellite constellations. We demonstrate that our proposal efficiently forwards the information over a satellite network derived from the Orbcomm topology while keeping a low replication overhead. We compare our algorithm against other well‐known DTN routing schemes and show that we obtain the lowest replication ratio with a delivery ratio of the same order of magnitude than a reference theoretical optimal routing. We also analyze the impact of terrestrial gateways density and analyze DQN performances in heterogeneous cases. Copyright © 2015 John Wiley & Sons, Ltd.     

Compressive spectrum sensing using chaotic matrices for cognitive radio networks

Compressive sensing is an emerging technique in cognitive radio systems, through which sub‐Nyquist sampling rates can be achieved without loss of significant information. In collaborative spectrum sensing networks with multiple secondary users, the problem is to find a reliable and fast sensing method and to secure communication between members of the same network. The method proposed in this paper provides both quick and reliable detection through compressive sensing and security through the use of deterministic chaotic sensing matrices. Deterministic matrices have an advantage over random ones since they are easier to generate and store. Moreover, it is much easier to verify whether a deterministic matrix satisfies the conditions for compressive sensing compared with random matrices, which is what makes them an interesting area of research in compressive sensing. Also, it would be a great advantage if the sensing matrices also provide inherent security, which is the motivation for using chaotic matrices in this paper, since any slight changes in the chaotic parameters result in highly uncorrelated chaotic sequences, hence entirely different sensing matrices. This makes it impossible to reconstruct the signal without proper knowledge of the parameters used to generate the sensing matrix. They can also be easily regenerated by knowing the correct initial values and parameters. Additionally, new modifications are proposed to the existing structures of chaotic matrices. The performance of chaotic sensing matrices for both existing and modified structures is compared with that of random sensing matrices.     

A performance comparison of measurement matrices in compressive sensing

Compressive sensing involves 3 main processes: signal sparse representation, linear encoding or measurement collection, and nonlinear decoding or sparse recovery. In the measurement process, a measurement matrix is used to sample only the components that best represent the signal. The choice of the measurement matrix has an important impact on the accuracy and the processing time of the sparse recovery process. Hence, the design of accurate measurement matrices is of vital importance in compressive sensing. Over the last decade, a number of measurement matrices have been proposed. Therefore, a detailed review of these measurement matrices and a comparison of their performances are strongly needed. This paper explains the foundation of compressive sensing and highlights the process of measurement by reviewing the existing measurement matrices. It provides a 3‐level classification and compares the performance of 8 measurement matrices belonging to 4 different types using 5 evaluation metrics: the recovery error, processing time, recovery time, covariance, and phase transition diagram. The theoretical performance comparison is validated with experimental results, and the results show that the Circulant, Toeplitz, and Hadamard matrices outperform the other measurement matrices.     

On Using Twisted-Ring Counters for Test Set Embedding in BIST

We present a novel built-in self-test (BIST) architecture for high-performance circuits. The proposed approach is especially suitable for embedding precomputed test sets for core-based systems since it does not require a structural model of the circuit, either for fault simulation or for test generation. It utilizes a twisted-ring counter (TRC) for test-per-clock BIST and is appropriate for high-performance designs because it does not add any mapping logic to critical functional paths. Test patterns are generated on-chip by carefully reseeding the TRC. We show that a small number of seeds is adequate for generating test sequences that embed complete test sets for the ISCAS benchmark circuits.Instead of being stored on-chip, the seed patterns can also be scanned in using a low-cost, slower tester. The seeds can be viewed as an encoded version of the test set that is stored in tester memory. This requires almost 10X less memory than compacted test sets obtained from ATPG programs. This allows us to effectively combine high-quality BIST with external testing using slow testers. As the cost of high-speed testers increases, methodologies that facilitate testing using slow testers become especially important. The proposed approach is a step in that direction.