应用于移动环境中的WLAN接入网结构

文章介绍了把无线局域网接入与GSM,GPRS漫游融合在一起的运营无线局域网(OWLAN),分析了OWLAN的主要系统单元及功能,讨论了基于用户识别模块(SIM)的鉴权、漫游和计费机理。     

Statistical Design of the Four-MOSFET Structure

The statistical design of the four-MOSFET structure is presented in this paper. The quantitative measure of the effect of mismatch between the four transistors on nonlinearity and offset current is provided through contours. Statistical optimization of the transistor and values is demonstrated. The four-MOSFET structure was fabricated through the MOSIS 2 m process using MOS transistor Level-3 model parameters. Experimental results are included in the paper.     

一种用于数字音频的插值滤波器设计

设计了一种应用于数字音频的插值滤波器。该滤波器采用多相插值原理,硬件电路包括并行数据输入接口、8倍插值器、16倍采样保持电路,实现对输入音频信号(PCM码)的128倍过采样。滤波器电路由VerilogHDL语言实现,利用SYNOPSYS提供的EDA工具进行仿真、综合,并通过FPGA验证,结果表明该电路能满足性能要求。     

低功耗VLSI芯片的设计方法

对便携式电子器件的日益需求已经导致了功耗在IC设计产业的重要性。根据VLSI的设计流程,结合微处理器的工作机制,在系统、行为、结构、逻辑和物理5个层面上对低功耗的设计方法做了全面地分析。     

深亚微米VLSI物理设计中天线效应的预防及修复

深亚微米超大规模集成电路(VLSI)中金属互连线的天线效应(PAE)将会严重影响芯片物理设计的结果,甚至造成设计的失败。因此详细分析了天线效应的产生、危害和计算方法,重点讨论了深亚微米VLSI芯片物理设计中的PAE预防和修复方法,并且针对面积和时序要求苛刻的复杂芯片设计提出了优化的迭代流程。上述方法和流程成功应用于本研究室协作承担的"风芯Ⅱ号"H.264/AVC-AVS视频解码SoC芯片的后端物理设计过程中,极大地提高了天线效应的预防和修复效率,消除了版图中全部潜在高危PAE问题且节省了18.18%的迭代次数,节约了17.39%的芯片管芯面积,确保并实现了芯片流片的一次成功。     

基于MDA的工作流门户整体风格的配置

针对不同的企业对业务过程管理有不同需求的问题，提出了可配置整体风格的业务过程管理门户。通过分析门户的组成来讲述门户整体风格配置所涉及的各个方面，并根据MDA（模型驱动框架）的思想给出具体的实现方案和步骤。     

Modular analysis and design of log-domain circuits based on LIN↔ELIN transformations

We systematized and developed some procedures for the modular design of externally-linear internally nonlinear (ELIN) circuits resulting in a general LIN↔ELIN transformation procedure. This one was also extended to analysis of these types of circuits. The procedure is exemplified on log-domain circuits. In the design one starts with the linear block diagram (LIN) described by transfer functions and one substitutes directly each linear building block by a corresponding nonlinear one. The parameters of each nonlinear component depend on the given parameters of its linear correspondent. Input F ⁻¹ and output F blocks are added. In the analysis one identifies the nonlinear basic circuit components and each of them is substituted by its corresponding linear building block. Input and output F ⁻¹-F cells are removed. The ideal transfer function can be calculated on the linear block diagram now. The LIN↔ELIN transformations make a direct connection between equivalent linear and ELIN circuits, simplify their design and analysis procedures and permit the development of CAD procedures.     

A two-level reconfigurable architecture for digital signal processing

This paper describes a novel reconfigurable architecture for digital signal processing (DSP). This architecture consists of a two-level array of cells and interconnections. On the upper level, fundamental DSP operations such as multiplication and addition are mapped onto blocks of 4-bit cells. On the lower level, each cell uses a 4 × 4 matrix of smaller “elements” to perform the necessary computations. Cells also contain pipeline latches for increased throughput. The architecture features a simple VLSI implementation that combines the flexibility of memory elements with the speed of DOMINO logic. Initial prototypes have been fabricated using a modest 0.5-μm CMOS technology. Circuit simulations of the cell in 0.25-μm technology indicate that the design achieves a clock frequency of 200 MHz.     

椭圆曲线密码处理器的高效VLSI设计与实现

采用复合武硬件设计方法，通过数学公式推导和电路结构设计，完成了一款GF（2m）域椭圆曲线密码处理器的高效VLSI实现。以低成本为目标，对算术逻辑模块的乘法、约减、平方、求逆，以及控制电路模块都进行了优化设计。按照椭圆曲线密码的不同运算层次，设计了不同层次的控制电路。该处理器综合在中芯国际SMIC0．18μm标准工艺库上．比相关研究的芯片面积节省48％，同时保证了很快的速度。     

后3G时代LTE异军突起

介绍了下一代无线网络LTE(Long Term Evolution,长期演进)的背景和发展状况.分析了LTE的技术特征,阐述了LTE网络结构与核心技术,并通过与WiFi(WirelessFidelity)及WiMAX(World wide Inter operability for Microwave Access)的各项性能作比较,着重分析了LTE的技术优势.最后,指出了LTE在个人通信市场所面临的应用前景与挑战.