Numerical properties of generalized discrepancies on spheres of arbitrary dimension

Quantifying uniformity of a configuration of points on the sphere is an interesting topic that is receiving growing attention in numerical analysis. An elegant solution has been provided by Cui and Freeden [J. Cui, W. Freeden, Equidistribution on the sphere, SIAM J. Sci. Comput. 18 (2) (1997) 595–609], where a class of discrepancies, called generalized discrepancies   and originally associated with pseudodifferential operators on the unit sphere in R³${\mathbb{R}}^3$, has been introduced. The objective of this paper is to extend to the sphere of arbitrary dimension this class of discrepancies and to study their numerical properties. First we show that generalized discrepancies are diaphonies on the hypersphere. This allows us to completely characterize the sequences of points for which convergence to zero of these discrepancies takes place. Then we discuss the worst-case error of quadrature rules and we derive a result on tractability of multivariate integration on the hypersphere. At last we provide several versions of Koksma–Hlawka type inequalities for integration of functions defined on the sphere.     

PVT法掺钒SiC单晶生长电阻率变化规律研究

在采用COREMA方法测试SiC晶片电阻率时发现同一晶片电阻率相差较大,主要体现在高阻(>105Ω.cm量级)和低阻(<105量级)并存,有的甚至超高阻(>1012量级)和低阻并存,针对这一测试结果,开展了相关的实验研究,SiC单晶半绝缘性能的实现是通过在单晶生长过程中掺入深能级杂质V来补偿浅施主N和浅受主B,利用二次质谱(SIMS)对同一晶片不同区域的杂质元素V、N和B含量进行测试,结果发现晶片中V和N的含量都在1×1017量级时会出现同一晶片不同区域电阻率相差较大的情况,而当V含量在1×1017量级,N含量在5×1016量级以下时,可制备电阻率均匀性好的半绝缘SiC单晶。     

TDI CCD光子响应非均匀性噪音分析与测量

探测器光子响应非均匀性噪音会降低低照度情况下遥感成像系统的成像质量.针对这一现象,本文首先结合探测器的物理性质,对各种噪音源进行了研究;建立了TDI CCD不同级数下的光子响应非均匀性噪音模型,随着曝光量的增加,光子响应非均匀性噪音也线性增加.其次根据曝光级数越多TDI CCD对非均匀性噪音的平滑效应越明显这一现象,提出一种光子响应非均匀性系数与曝光级数之间的关系式,并给出了利用TDI CCD输出图像提取光子响应非均匀性噪音的方法.最后建立了试验系统,通过试验对测试获得的光子响应非均匀性噪音与理论分析计算得出的结果进行了分析.     

IGBT RBSOA失效分析及改善方案

一种绝缘栅双极晶体管模块在做反向偏置安全工作区测试时,器件在较低的关断电流下就发生了损坏。失效分析显示失效区的位置靠近栅极条区。模拟显示失效区处元胞结构并非对称,而正常元胞结构是对称的,由此造成了该处元胞的闩锁电流密度比对称结构元胞的闩锁电流密度低。因此,元胞结构的一致性不好是RBSOA关断电流低的原因。通过修改版图设计,使工作区元胞结构一致。对改版后的芯片封装后进行RBSOA测试,结果显示安全关断电流有明显提高。     

倒装芯片化学镀镍/金凸点技术

本文对倒装芯片化学镀镍/金凸点技术进行了阐述。文中主要讨论了化学镀镍/金凸点的表面形貌、均匀性及其在铝电极上的附着性能等问题。     

强流氧离子注入机注入均匀性分析及提高

对强流氧离子注入机的注入靶室进行分析探讨,对影响均匀性指标的靶盘结构、束的形状和束扫描注入方式进行研究,结合主体硬件,增加晶片自旋装置和采用新的扫描方式,来提高注入均匀性指标。     

太赫兹脉冲光谱法测量微米级多层油漆涂层厚度技术

在汽车工业、飞机、船舶等领域中,油漆的涂层厚度管理对产品防水、防锈功能和颜色效果有着重要影响,但是目前采用的商业化涂层测厚仪都是接触式,并且很难直接获得多层涂层中的各层厚度。利用反射式太赫兹时域光谱(THz-TDS)系统探测样品的太赫兹脉冲光谱,基于脉冲回波的飞行时间建立简易的单点漆膜厚度提取模型。并通过最小二乘法拟合油漆样品的光学厚度与几何厚度之间的线性关系计算出12种涂覆在铝板上的油漆样品的测量折射率,发现金属油漆与非金属油漆在太赫兹波段的折射率存在较大的差异,闪光银色油漆样品的测量折射率为5.15,而白色油漆样品的测量折射率仅为2.64。在单层白色油漆样品厚度分布均匀的区域内测量50个点的膜厚,以磁/涡流感应涂层测厚仪的测量数据为参考标准,得到的厚度平均值为71.7 μm,测量误差为3.5 μm。对双层油漆样品进行二维扫描,测得白色油漆和底漆的厚度分布分别是(233±13)和(130±11) μm。同样,通过黑色三层油漆样品和银色三层油漆样品的二维分布图,分析了各层的漆膜厚度及其分布的均匀性。结果表明,太赫兹脉冲光谱法实现了1～3层漆膜的厚度测量及其分布均匀性评估,该方法对金属油漆的厚度分辨力较高,并且可通过非接触探测样品的太赫兹脉冲光谱,获得多层油漆的各层厚度及厚度的二维分布信息,易于实现喷涂质量的评估。     

The Dyck and the Preiss separation uniformly

We are concerned with two separation theorems about analytic sets by Dyck and Preiss, the former involves the positively-defined subsets of the Cantor space and the latter the Borel-convex subsets of finite dimensional Banach spaces. We show by introducing the corresponding separation trees that both of these results admit a constructive proof. This enables us to give the uniform version of these separation theorems, and to derive as corollaries the results, which are analogous to the fundamental fact “HYP is effectively bi-analytic” provided by the Suslin–Kleene Theorem.     

密集散热区PTH孔问题研究

现有PCB局部散热技术主要是通过局部埋铜块或局部设计密集孔来实现散热。在电镀时由于密集孔区域与稀疏孔区域,存在明显的电位差,导致传统电镀方法及电镀线很难满足要求。文章主要通过设计不同的方法来验证并改善局部密集散热区域PTH镀铜品质问题。     

Temperature Uniformity Optimization for a silicon implant anneal into GaAs using Opus ™ simulation software

Opus ^™, which stands for “Optimized Uniformity Simulator”, has been described in the literature as a powerful tool to assist in the optimization of temperature uniformity in the STEAG Electronic Systems series of rapid thermal processors. Historically, this tool has been used extensively for a variety of silicon processing. With this simulation, the temperature uniformity of 100 mm Si₃N₄ encapsulated GaAs with a dual silicon implant anneal at 847°C, 40 s was optimized to <2°C across the wafer. Ramp rates ≤20°C/s were obtained without slip.